Skip to content
Nightly Release

Nightly Release #542

Sign in to view logs

Nightly Release

Nightly Release #542

Re-run triggered February 20, 2025 18:13
@nquartonnquarton
⁠ e1dcb71
main
Status Success
Total duration 1h 5m 51s
Artifacts 74

nightly-release.yml

on: schedule
Find Latest Release
29s
Find Latest Release
FPGA Suite (1.0, etrng, log)  /  check_cache
15s
FPGA Suite (1.0, etrng, log) / check_cache
FPGA Suite (1.0, etrng, nolog)  /  check_cache
20s
FPGA Suite (1.0, etrng, nolog) / check_cache
FPGA Suite (1.0, itrng, log)  /  check_cache
13s
FPGA Suite (1.0, itrng, log) / check_cache
FPGA Suite (1.0, itrng, nolog)  /  check_cache
13s
FPGA Suite (1.0, itrng, nolog) / check_cache
FPGA Suite (1.1, etrng, log)  /  check_cache
13s
FPGA Suite (1.1, etrng, log) / check_cache
FPGA Suite (1.1, etrng, nolog)  /  check_cache
20s
FPGA Suite (1.1, etrng, nolog) / check_cache
FPGA Suite (1.1, itrng, log)  /  check_cache
12s
FPGA Suite (1.1, itrng, log) / check_cache
FPGA Suite (1.1, itrng, nolog)  /  check_cache
11s
FPGA Suite (1.1, itrng, nolog) / check_cache
FPGA Suite (hw-latest, etrng, log)  /  check_cache
13s
FPGA Suite (hw-latest, etrng, log) / check_cache
FPGA Suite (hw-latest, etrng, nolog)  /  check_cache
11s
FPGA Suite (hw-latest, etrng, nolog) / check_cache
FPGA Suite (hw-latest, itrng, log)  /  check_cache
17s
FPGA Suite (hw-latest, itrng, log) / check_cache
FPGA Suite (hw-latest, itrng, nolog)  /  check_cache
23s
FPGA Suite (hw-latest, itrng, nolog) / check_cache
sw-emulator Suite (etrng, log)  /  build_and_test
21m 39s
sw-emulator Suite (etrng, log) / build_and_test
sw-emulator Suite (etrng, nolog)  /  build_and_test
20m 45s
sw-emulator Suite (etrng, nolog) / build_and_test
sw-emulator Suite (itrng, log)  /  build_and_test
21m 7s
sw-emulator Suite (itrng, log) / build_and_test
sw-emulator Suite (itrng, nolog)  /  build_and_test
20m 57s
sw-emulator Suite (itrng, nolog) / build_and_test
sw-emulator Suite (etrng, log)  /  build_and_test
21m 4s
sw-emulator Suite (etrng, log) / build_and_test
sw-emulator Suite (etrng, nolog)  /  build_and_test
20m 39s
sw-emulator Suite (etrng, nolog) / build_and_test
sw-emulator Suite (itrng, log)  /  build_and_test
21m 18s
sw-emulator Suite (itrng, log) / build_and_test
sw-emulator Suite (itrng, nolog)  /  build_and_test
20m 48s
sw-emulator Suite (itrng, nolog) / build_and_test
FPGA Suite (1.0, etrng, log)  /  build_test_binaries
3m 30s
FPGA Suite (1.0, etrng, log) / build_test_binaries
FPGA Suite (1.0, etrng, nolog)  /  build_test_binaries
3m 34s
FPGA Suite (1.0, etrng, nolog) / build_test_binaries
FPGA Suite (1.0, itrng, log)  /  build_test_binaries
3m 37s
FPGA Suite (1.0, itrng, log) / build_test_binaries
FPGA Suite (1.0, itrng, nolog)  /  build_test_binaries
3m 58s
FPGA Suite (1.0, itrng, nolog) / build_test_binaries
FPGA Suite (1.1, etrng, log)  /  build_test_binaries
3m 49s
FPGA Suite (1.1, etrng, log) / build_test_binaries
FPGA Suite (1.1, etrng, nolog)  /  build_test_binaries
5m 2s
FPGA Suite (1.1, etrng, nolog) / build_test_binaries
FPGA Suite (1.1, itrng, log)  /  build_test_binaries
3m 43s
FPGA Suite (1.1, itrng, log) / build_test_binaries
FPGA Suite (1.1, itrng, nolog)  /  build_test_binaries
3m 45s
FPGA Suite (1.1, itrng, nolog) / build_test_binaries
FPGA Suite (hw-latest, etrng, log)  /  build_test_binaries
5m 14s
FPGA Suite (hw-latest, etrng, log) / build_test_binaries
FPGA Suite (hw-latest, etrng, nolog)  /  build_test_binaries
3m 37s
FPGA Suite (hw-latest, etrng, nolog) / build_test_binaries
FPGA Suite (hw-latest, itrng, log)  /  build_test_binaries
4m 54s
FPGA Suite (hw-latest, itrng, log) / build_test_binaries
FPGA Suite (hw-latest, itrng, nolog)  /  build_test_binaries
4m 56s
FPGA Suite (hw-latest, itrng, nolog) / build_test_binaries
sw-emulator Suite (etrng, log)  /  build_and_test
21m 14s
sw-emulator Suite (etrng, log) / build_and_test
sw-emulator Suite (etrng, nolog)  /  build_and_test
20m 53s
sw-emulator Suite (etrng, nolog) / build_and_test
sw-emulator Suite (itrng, log)  /  build_and_test
21m 0s
sw-emulator Suite (itrng, log) / build_and_test
sw-emulator Suite (itrng, nolog)  /  build_and_test
20m 29s
sw-emulator Suite (itrng, nolog) / build_and_test
FPGA Suite (1.0, etrng, log)  /  build_bitstream
0s
FPGA Suite (1.0, etrng, log) / build_bitstream
FPGA Suite (1.0, etrng, log)  /  build_kernel_modules
0s
FPGA Suite (1.0, etrng, log) / build_kernel_modules
FPGA Suite (1.0, etrng, nolog)  /  build_bitstream
0s
FPGA Suite (1.0, etrng, nolog) / build_bitstream
FPGA Suite (1.0, etrng, nolog)  /  build_kernel_modules
0s
FPGA Suite (1.0, etrng, nolog) / build_kernel_modules
FPGA Suite (1.0, itrng, log)  /  build_bitstream
0s
FPGA Suite (1.0, itrng, log) / build_bitstream
FPGA Suite (1.0, itrng, log)  /  build_kernel_modules
0s
FPGA Suite (1.0, itrng, log) / build_kernel_modules
FPGA Suite (1.0, itrng, nolog)  /  build_bitstream
0s
FPGA Suite (1.0, itrng, nolog) / build_bitstream
FPGA Suite (1.0, itrng, nolog)  /  build_kernel_modules
0s
FPGA Suite (1.0, itrng, nolog) / build_kernel_modules
FPGA Suite (1.1, etrng, log)  /  build_bitstream
0s
FPGA Suite (1.1, etrng, log) / build_bitstream
FPGA Suite (1.1, etrng, log)  /  build_kernel_modules
0s
FPGA Suite (1.1, etrng, log) / build_kernel_modules
FPGA Suite (1.1, etrng, nolog)  /  build_bitstream
0s
FPGA Suite (1.1, etrng, nolog) / build_bitstream
FPGA Suite (1.1, etrng, nolog)  /  build_kernel_modules
0s
FPGA Suite (1.1, etrng, nolog) / build_kernel_modules
FPGA Suite (1.1, itrng, log)  /  build_bitstream
0s
FPGA Suite (1.1, itrng, log) / build_bitstream
FPGA Suite (1.1, itrng, log)  /  build_kernel_modules
0s
FPGA Suite (1.1, itrng, log) / build_kernel_modules
FPGA Suite (1.1, itrng, nolog)  /  build_bitstream
0s
FPGA Suite (1.1, itrng, nolog) / build_bitstream
FPGA Suite (1.1, itrng, nolog)  /  build_kernel_modules
0s
FPGA Suite (1.1, itrng, nolog) / build_kernel_modules
FPGA Suite (hw-latest, etrng, log)  /  build_bitstream
0s
FPGA Suite (hw-latest, etrng, log) / build_bitstream
FPGA Suite (hw-latest, etrng, log)  /  build_kernel_modules
0s
FPGA Suite (hw-latest, etrng, log) / build_kernel_modules
FPGA Suite (hw-latest, etrng, nolog)  /  build_bitstream
0s
FPGA Suite (hw-latest, etrng, nolog) / build_bitstream
FPGA Suite (hw-latest, etrng, nolog)  /  build_kernel_modules
0s
FPGA Suite (hw-latest, etrng, nolog) / build_kernel_modules
FPGA Suite (hw-latest, itrng, log)  /  build_bitstream
0s
FPGA Suite (hw-latest, itrng, log) / build_bitstream
FPGA Suite (hw-latest, itrng, log)  /  build_kernel_modules
0s
FPGA Suite (hw-latest, itrng, log) / build_kernel_modules
FPGA Suite (hw-latest, itrng, nolog)  /  build_bitstream
0s
FPGA Suite (hw-latest, itrng, nolog) / build_bitstream
FPGA Suite (hw-latest, itrng, nolog)  /  build_kernel_modules
0s
FPGA Suite (hw-latest, itrng, nolog) / build_kernel_modules
FPGA Suite (1.0, etrng, log)  /  cache_fpga_bitstream_artifact
0s
FPGA Suite (1.0, etrng, log) / cache_fpga_bitstream_artifact
FPGA Suite (1.0, etrng, log)  /  test_artifacts
1h 0m
FPGA Suite (1.0, etrng, log) / test_artifacts
FPGA Suite (1.0, etrng, nolog)  /  cache_fpga_bitstream_artifact
0s
FPGA Suite (1.0, etrng, nolog) / cache_fpga_bitstream_artifact
FPGA Suite (1.0, etrng, nolog)  /  test_artifacts
57m 2s
FPGA Suite (1.0, etrng, nolog) / test_artifacts
FPGA Suite (1.0, itrng, log)  /  cache_fpga_bitstream_artifact
0s
FPGA Suite (1.0, itrng, log) / cache_fpga_bitstream_artifact
FPGA Suite (1.0, itrng, log)  /  test_artifacts
1h 1m
FPGA Suite (1.0, itrng, log) / test_artifacts
FPGA Suite (1.0, itrng, nolog)  /  cache_fpga_bitstream_artifact
0s
FPGA Suite (1.0, itrng, nolog) / cache_fpga_bitstream_artifact
FPGA Suite (1.0, itrng, nolog)  /  test_artifacts
57m 24s
FPGA Suite (1.0, itrng, nolog) / test_artifacts
FPGA Suite (1.1, etrng, log)  /  cache_fpga_bitstream_artifact
0s
FPGA Suite (1.1, etrng, log) / cache_fpga_bitstream_artifact
FPGA Suite (1.1, etrng, log)  /  test_artifacts
48m 19s
FPGA Suite (1.1, etrng, log) / test_artifacts
FPGA Suite (1.1, etrng, nolog)  /  cache_fpga_bitstream_artifact
0s
FPGA Suite (1.1, etrng, nolog) / cache_fpga_bitstream_artifact
FPGA Suite (1.1, etrng, nolog)  /  test_artifacts
47m 54s
FPGA Suite (1.1, etrng, nolog) / test_artifacts
FPGA Suite (1.1, itrng, log)  /  cache_fpga_bitstream_artifact
0s
FPGA Suite (1.1, itrng, log) / cache_fpga_bitstream_artifact
FPGA Suite (1.1, itrng, log)  /  test_artifacts
47m 27s
FPGA Suite (1.1, itrng, log) / test_artifacts
FPGA Suite (1.1, itrng, nolog)  /  cache_fpga_bitstream_artifact
0s
FPGA Suite (1.1, itrng, nolog) / cache_fpga_bitstream_artifact
FPGA Suite (1.1, itrng, nolog)  /  test_artifacts
48m 28s
FPGA Suite (1.1, itrng, nolog) / test_artifacts
FPGA Suite (hw-latest, etrng, log)  /  cache_fpga_bitstream_artifact
0s
FPGA Suite (hw-latest, etrng, log) / cache_fpga_bitstream_artifact
FPGA Suite (hw-latest, etrng, log)  /  test_artifacts
48m 6s
FPGA Suite (hw-latest, etrng, log) / test_artifacts
FPGA Suite (hw-latest, etrng, nolog)  /  cache_fpga_bitstream_artifact
0s
FPGA Suite (hw-latest, etrng, nolog) / cache_fpga_bitstream_artifact
FPGA Suite (hw-latest, etrng, nolog)  /  test_artifacts
47m 59s
FPGA Suite (hw-latest, etrng, nolog) / test_artifacts
FPGA Suite (hw-latest, itrng, log)  /  cache_fpga_bitstream_artifact
0s
FPGA Suite (hw-latest, itrng, log) / cache_fpga_bitstream_artifact
FPGA Suite (hw-latest, itrng, log)  /  test_artifacts
48m 50s
FPGA Suite (hw-latest, itrng, log) / test_artifacts
FPGA Suite (hw-latest, itrng, nolog)  /  cache_fpga_bitstream_artifact
0s
FPGA Suite (hw-latest, itrng, nolog) / cache_fpga_bitstream_artifact
FPGA Suite (hw-latest, itrng, nolog)  /  test_artifacts
48m 14s
FPGA Suite (hw-latest, itrng, nolog) / test_artifacts
Create New Release
4m 38s
Create New Release
Publish https://caliptra-sw.github.io/  /  build
2m 47s
Publish https://caliptra-sw.github.io/ / build
Publish https://caliptra-sw.github.io/  /  deploy
15s
Publish https://caliptra-sw.github.io/ / deploy
Fit to window
Zoom out
Zoom in

Artifacts

Produced during runtime
Name Size
caliptra-test-results-fpga-realtime-hw-1.0-etrng-nolog
783 KB
github-pages Expired
37.9 MB
release-info
305 Bytes