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Nightly Release

Nightly Release #528

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Nightly Release

Nightly Release #528

Manually triggered February 12, 2025 16:58
@ArthurHeymansArthurHeymans
⁠ 2aec9fb
ReleaseArtefacts
Status Startup failure
Total duration –
Artifacts –

nightly-release.yml

on: workflow_dispatch
Find Latest Release
Find Latest Release
Find Latest Release  /  Find Latest Release
Find Latest Release
FPGA Suite (1.0, etrng, log)  /  check_cache
FPGA Suite (1.0, etrng, log) / check_cache
FPGA Suite (1.0, etrng, nolog)  /  check_cache
FPGA Suite (1.0, etrng, nolog) / check_cache
FPGA Suite (1.0, itrng, log)  /  check_cache
FPGA Suite (1.0, itrng, log) / check_cache
FPGA Suite (1.0, itrng, nolog)  /  check_cache
FPGA Suite (1.0, itrng, nolog) / check_cache
FPGA Suite (1.1, etrng, log)  /  check_cache
FPGA Suite (1.1, etrng, log) / check_cache
FPGA Suite (1.1, etrng, nolog)  /  check_cache
FPGA Suite (1.1, etrng, nolog) / check_cache
FPGA Suite (1.1, itrng, log)  /  check_cache
FPGA Suite (1.1, itrng, log) / check_cache
FPGA Suite (1.1, itrng, nolog)  /  check_cache
FPGA Suite (1.1, itrng, nolog) / check_cache
FPGA Suite (hw-latest, etrng, log)  /  check_cache
FPGA Suite (hw-latest, etrng, log) / check_cache
FPGA Suite (hw-latest, etrng, nolog)  /  check_cache
FPGA Suite (hw-latest, etrng, nolog) / check_cache
FPGA Suite (hw-latest, itrng, log)  /  check_cache
FPGA Suite (hw-latest, itrng, log) / check_cache
FPGA Suite (hw-latest, itrng, nolog)  /  check_cache
FPGA Suite (hw-latest, itrng, nolog) / check_cache
sw-emulator Suite (etrng, log)  /  build_and_test
sw-emulator Suite (etrng, log) / build_and_test
sw-emulator Suite (etrng, log)  /  build_and_test
sw-emulator Suite (etrng, log) / build_and_test
sw-emulator Suite (etrng, nolog)  /  build_and_test
sw-emulator Suite (etrng, nolog) / build_and_test
sw-emulator Suite (etrng, nolog)  /  build_and_test
sw-emulator Suite (etrng, nolog) / build_and_test
sw-emulator Suite (itrng, log)  /  build_and_test
sw-emulator Suite (itrng, log) / build_and_test
sw-emulator Suite (itrng, log)  /  build_and_test
sw-emulator Suite (itrng, log) / build_and_test
sw-emulator Suite (itrng, nolog)  /  build_and_test
sw-emulator Suite (itrng, nolog) / build_and_test
sw-emulator Suite (itrng, nolog)  /  build_and_test
sw-emulator Suite (itrng, nolog) / build_and_test
sw-emulator Suite (etrng, log)  /  build_and_test
sw-emulator Suite (etrng, log) / build_and_test
sw-emulator Suite (etrng, nolog)  /  build_and_test
sw-emulator Suite (etrng, nolog) / build_and_test
FPGA Suite (1.0, etrng, log)  /  build_test_binaries
FPGA Suite (1.0, etrng, log) / build_test_binaries
FPGA Suite (1.0, etrng, nolog)  /  build_test_binaries
FPGA Suite (1.0, etrng, nolog) / build_test_binaries
FPGA Suite (1.0, itrng, log)  /  build_test_binaries
FPGA Suite (1.0, itrng, log) / build_test_binaries
FPGA Suite (1.0, itrng, nolog)  /  build_test_binaries
FPGA Suite (1.0, itrng, nolog) / build_test_binaries
FPGA Suite (1.1, etrng, log)  /  build_test_binaries
FPGA Suite (1.1, etrng, log) / build_test_binaries
FPGA Suite (1.1, etrng, nolog)  /  build_test_binaries
FPGA Suite (1.1, etrng, nolog) / build_test_binaries
FPGA Suite (1.1, itrng, log)  /  build_test_binaries
FPGA Suite (1.1, itrng, log) / build_test_binaries
FPGA Suite (1.1, itrng, nolog)  /  build_test_binaries
FPGA Suite (1.1, itrng, nolog) / build_test_binaries
FPGA Suite (hw-latest, etrng, log)  /  build_test_binaries
FPGA Suite (hw-latest, etrng, log) / build_test_binaries
FPGA Suite (hw-latest, etrng, nolog)  /  build_test_binaries
FPGA Suite (hw-latest, etrng, nolog) / build_test_binaries
FPGA Suite (hw-latest, itrng, log)  /  build_test_binaries
FPGA Suite (hw-latest, itrng, log) / build_test_binaries
FPGA Suite (hw-latest, itrng, nolog)  /  build_test_binaries
FPGA Suite (hw-latest, itrng, nolog) / build_test_binaries
sw-emulator Suite (etrng, log)  /  build_and_test
sw-emulator Suite (etrng, log) / build_and_test
sw-emulator Suite (etrng, nolog)  /  build_and_test
sw-emulator Suite (etrng, nolog) / build_and_test
sw-emulator Suite (itrng, log)  /  build_and_test
sw-emulator Suite (itrng, log) / build_and_test
sw-emulator Suite (itrng, nolog)  /  build_and_test
sw-emulator Suite (itrng, nolog) / build_and_test
sw-emulator Suite (itrng, log)  /  build_and_test
sw-emulator Suite (itrng, log) / build_and_test
sw-emulator Suite (itrng, nolog)  /  build_and_test
sw-emulator Suite (itrng, nolog) / build_and_test
FPGA Suite (1.0, etrng, log)  /  build_bitstream
FPGA Suite (1.0, etrng, log) / build_bitstream
FPGA Suite (1.0, etrng, log)  /  build_kernel_modules
FPGA Suite (1.0, etrng, log) / build_kernel_modules
FPGA Suite (1.0, etrng, nolog)  /  build_bitstream
FPGA Suite (1.0, etrng, nolog) / build_bitstream
FPGA Suite (1.0, etrng, nolog)  /  build_kernel_modules
FPGA Suite (1.0, etrng, nolog) / build_kernel_modules
FPGA Suite (1.0, itrng, log)  /  build_bitstream
FPGA Suite (1.0, itrng, log) / build_bitstream
FPGA Suite (1.0, itrng, log)  /  build_kernel_modules
FPGA Suite (1.0, itrng, log) / build_kernel_modules
FPGA Suite (1.0, itrng, nolog)  /  build_bitstream
FPGA Suite (1.0, itrng, nolog) / build_bitstream
FPGA Suite (1.0, itrng, nolog)  /  build_kernel_modules
FPGA Suite (1.0, itrng, nolog) / build_kernel_modules
FPGA Suite (1.1, etrng, log)  /  build_bitstream
FPGA Suite (1.1, etrng, log) / build_bitstream
FPGA Suite (1.1, etrng, log)  /  build_kernel_modules
FPGA Suite (1.1, etrng, log) / build_kernel_modules
FPGA Suite (1.1, etrng, nolog)  /  build_bitstream
FPGA Suite (1.1, etrng, nolog) / build_bitstream
FPGA Suite (1.1, etrng, nolog)  /  build_kernel_modules
FPGA Suite (1.1, etrng, nolog) / build_kernel_modules
FPGA Suite (1.1, itrng, log)  /  build_bitstream
FPGA Suite (1.1, itrng, log) / build_bitstream
FPGA Suite (1.1, itrng, log)  /  build_kernel_modules
FPGA Suite (1.1, itrng, log) / build_kernel_modules
FPGA Suite (1.1, itrng, nolog)  /  build_bitstream
FPGA Suite (1.1, itrng, nolog) / build_bitstream
FPGA Suite (1.1, itrng, nolog)  /  build_kernel_modules
FPGA Suite (1.1, itrng, nolog) / build_kernel_modules
FPGA Suite (hw-latest, etrng, log)  /  build_bitstream
FPGA Suite (hw-latest, etrng, log) / build_bitstream
FPGA Suite (hw-latest, etrng, log)  /  build_kernel_modules
FPGA Suite (hw-latest, etrng, log) / build_kernel_modules
FPGA Suite (hw-latest, etrng, nolog)  /  build_bitstream
FPGA Suite (hw-latest, etrng, nolog) / build_bitstream
FPGA Suite (hw-latest, etrng, nolog)  /  build_kernel_modules
FPGA Suite (hw-latest, etrng, nolog) / build_kernel_modules
FPGA Suite (hw-latest, itrng, log)  /  build_bitstream
FPGA Suite (hw-latest, itrng, log) / build_bitstream
FPGA Suite (hw-latest, itrng, log)  /  build_kernel_modules
FPGA Suite (hw-latest, itrng, log) / build_kernel_modules
FPGA Suite (hw-latest, itrng, nolog)  /  build_bitstream
FPGA Suite (hw-latest, itrng, nolog) / build_bitstream
FPGA Suite (hw-latest, itrng, nolog)  /  build_kernel_modules
FPGA Suite (hw-latest, itrng, nolog) / build_kernel_modules
Create New Release 2.x  /  Create New Release 2.x
Create New Release 2.x
FPGA Suite (1.0, etrng, log)  /  cache_fpga_bitstream_artifact
FPGA Suite (1.0, etrng, log) / cache_fpga_bitstream_artifact
FPGA Suite (1.0, etrng, log)  /  test_artifacts
FPGA Suite (1.0, etrng, log) / test_artifacts
FPGA Suite (1.0, etrng, nolog)  /  cache_fpga_bitstream_artifact
FPGA Suite (1.0, etrng, nolog) / cache_fpga_bitstream_artifact
FPGA Suite (1.0, etrng, nolog)  /  test_artifacts
FPGA Suite (1.0, etrng, nolog) / test_artifacts
FPGA Suite (1.0, itrng, log)  /  cache_fpga_bitstream_artifact
FPGA Suite (1.0, itrng, log) / cache_fpga_bitstream_artifact
FPGA Suite (1.0, itrng, log)  /  test_artifacts
FPGA Suite (1.0, itrng, log) / test_artifacts
FPGA Suite (1.0, itrng, nolog)  /  cache_fpga_bitstream_artifact
FPGA Suite (1.0, itrng, nolog) / cache_fpga_bitstream_artifact
FPGA Suite (1.0, itrng, nolog)  /  test_artifacts
FPGA Suite (1.0, itrng, nolog) / test_artifacts
FPGA Suite (1.1, etrng, log)  /  cache_fpga_bitstream_artifact
FPGA Suite (1.1, etrng, log) / cache_fpga_bitstream_artifact
FPGA Suite (1.1, etrng, log)  /  test_artifacts
FPGA Suite (1.1, etrng, log) / test_artifacts
FPGA Suite (1.1, etrng, nolog)  /  cache_fpga_bitstream_artifact
FPGA Suite (1.1, etrng, nolog) / cache_fpga_bitstream_artifact
FPGA Suite (1.1, etrng, nolog)  /  test_artifacts
FPGA Suite (1.1, etrng, nolog) / test_artifacts
FPGA Suite (1.1, itrng, log)  /  cache_fpga_bitstream_artifact
FPGA Suite (1.1, itrng, log) / cache_fpga_bitstream_artifact
FPGA Suite (1.1, itrng, log)  /  test_artifacts
FPGA Suite (1.1, itrng, log) / test_artifacts
FPGA Suite (1.1, itrng, nolog)  /  cache_fpga_bitstream_artifact
FPGA Suite (1.1, itrng, nolog) / cache_fpga_bitstream_artifact
FPGA Suite (1.1, itrng, nolog)  /  test_artifacts
FPGA Suite (1.1, itrng, nolog) / test_artifacts
FPGA Suite (hw-latest, etrng, log)  /  cache_fpga_bitstream_artifact
FPGA Suite (hw-latest, etrng, log) / cache_fpga_bitstream_artifact
FPGA Suite (hw-latest, etrng, log)  /  test_artifacts
FPGA Suite (hw-latest, etrng, log) / test_artifacts
FPGA Suite (hw-latest, etrng, nolog)  /  cache_fpga_bitstream_artifact
FPGA Suite (hw-latest, etrng, nolog) / cache_fpga_bitstream_artifact
FPGA Suite (hw-latest, etrng, nolog)  /  test_artifacts
FPGA Suite (hw-latest, etrng, nolog) / test_artifacts
FPGA Suite (hw-latest, itrng, log)  /  cache_fpga_bitstream_artifact
FPGA Suite (hw-latest, itrng, log) / cache_fpga_bitstream_artifact
FPGA Suite (hw-latest, itrng, log)  /  test_artifacts
FPGA Suite (hw-latest, itrng, log) / test_artifacts
FPGA Suite (hw-latest, itrng, nolog)  /  cache_fpga_bitstream_artifact
FPGA Suite (hw-latest, itrng, nolog) / cache_fpga_bitstream_artifact
FPGA Suite (hw-latest, itrng, nolog)  /  test_artifacts
FPGA Suite (hw-latest, itrng, nolog) / test_artifacts
Create New Release
Create New Release
Publish https://caliptra-sw.github.io/  /  build
Publish https://caliptra-sw.github.io/ / build
Publish https://caliptra-sw.github.io/  /  deploy
Publish https://caliptra-sw.github.io/ / deploy
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1 error
Invalid workflow file: .github/workflows/nightly-release.yml#L59
The workflow is not valid. .github/workflows/nightly-release.yml (Line: 59, Col: 3): The identifier 'find-latest-release-2.x' is invalid. IDs may only contain alphanumeric characters, '_', and '-'. IDs must start with a letter or '_' and and must be less than 100 characters. .github/workflows/nightly-release.yml (Line: 300, Col: 3): The identifier 'sw-emulator-hw-latest-full-suite-etrng-log-2.x' is invalid. IDs may only contain alphanumeric characters, '_', and '-'. IDs must start with a letter or '_' and and must be less than 100 characters.