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Nightly Release

Nightly Release #498

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Nightly Release

Nightly Release #498

Run time

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Job Run time
Find Latest Release
13s
FPGA Suite (1.0, etrng, log) / check_cache
12s
FPGA Suite (1.0, etrng, nolog) / check_cache
11s
FPGA Suite (1.0, etrng, nolog) / build_test_binaries
3m 26s
FPGA Suite (1.0, etrng, log) / build_test_binaries
3m 30s
FPGA Suite (1.0, itrng, log) / build_test_binaries
3m 35s
FPGA Suite (1.0, itrng, log) / check_cache
11s
FPGA Suite (1.0, itrng, nolog) / check_cache
12s
FPGA Suite (1.0, itrng, nolog) / build_test_binaries
3m 43s
FPGA Suite (1.1, etrng, log) / build_test_binaries
3m 31s
FPGA Suite (1.1, etrng, log) / check_cache
25s
FPGA Suite (1.1, etrng, nolog) / build_test_binaries
3m 34s
FPGA Suite (1.1, etrng, nolog) / check_cache
25s
FPGA Suite (1.1, itrng, log) / build_test_binaries
4m 36s
FPGA Suite (1.1, itrng, log) / check_cache
13s
FPGA Suite (1.1, itrng, nolog) / build_test_binaries
3m 36s
FPGA Suite (1.1, itrng, nolog) / check_cache
12s
FPGA Suite (hw-latest, etrng, log) / build_test_binaries
5m 11s
FPGA Suite (hw-latest, etrng, log) / check_cache
25s
FPGA Suite (hw-latest, etrng, nolog) / build_test_binaries
3m 30s
FPGA Suite (hw-latest, etrng, nolog) / check_cache
14s
FPGA Suite (hw-latest, itrng, log) / build_test_binaries
3m 22s
FPGA Suite (hw-latest, itrng, log) / check_cache
12s
FPGA Suite (hw-latest, itrng, nolog) / build_test_binaries
3m 47s
FPGA Suite (hw-latest, itrng, nolog) / check_cache
17s
sw-emulator Suite (etrng, log) / build_and_test
21m 59s
sw-emulator Suite (etrng, nolog) / build_and_test
21m 5s
sw-emulator Suite (itrng, log) / build_and_test
22m 27s
sw-emulator Suite (itrng, nolog) / build_and_test
21m 34s
sw-emulator Suite (etrng, log) / build_and_test
20m 5s
sw-emulator Suite (etrng, nolog) / build_and_test
19m 52s
sw-emulator Suite (itrng, nolog) / build_and_test
19m 57s
sw-emulator Suite (itrng, log) / build_and_test
20m 24s
sw-emulator Suite (etrng, log) / build_and_test
21m 27s
sw-emulator Suite (itrng, log) / build_and_test
21m 13s
sw-emulator Suite (etrng, nolog) / build_and_test
20m 18s
sw-emulator Suite (itrng, nolog) / build_and_test
20m 47s
FPGA Suite (1.0, etrng, nolog) / build_kernel_modules
0s
FPGA Suite (1.0, etrng, nolog) / build_bitstream
0s
FPGA Suite (1.0, etrng, log) / build_bitstream
0s
FPGA Suite (1.0, etrng, log) / build_kernel_modules
0s
FPGA Suite (1.0, itrng, log) / build_bitstream
0s
FPGA Suite (1.0, itrng, log) / build_kernel_modules
0s
FPGA Suite (1.0, itrng, nolog) / build_bitstream
0s
FPGA Suite (1.0, itrng, nolog) / build_kernel_modules
0s
FPGA Suite (hw-latest, itrng, log) / build_bitstream
0s
FPGA Suite (hw-latest, itrng, log) / build_kernel_modules
0s
FPGA Suite (1.0, etrng, nolog) / cache_fpga_bitstream_artifact
0s
FPGA Suite (1.0, etrng, log) / cache_fpga_bitstream_artifact
0s
FPGA Suite (1.1, itrng, nolog) / build_bitstream
0s
FPGA Suite (1.1, itrng, nolog) / build_kernel_modules
0s
FPGA Suite (1.0, itrng, log) / cache_fpga_bitstream_artifact
0s
FPGA Suite (1.0, itrng, nolog) / cache_fpga_bitstream_artifact
0s
FPGA Suite (hw-latest, itrng, log) / cache_fpga_bitstream_artifact
0s
FPGA Suite (1.1, itrng, nolog) / cache_fpga_bitstream_artifact
0s
FPGA Suite (1.1, itrng, log) / build_kernel_modules
0s
FPGA Suite (1.1, itrng, log) / build_bitstream
0s
FPGA Suite (1.1, itrng, log) / cache_fpga_bitstream_artifact
0s
FPGA Suite (hw-latest, etrng, nolog) / build_bitstream
0s
FPGA Suite (hw-latest, etrng, nolog) / build_kernel_modules
0s
FPGA Suite (hw-latest, etrng, nolog) / cache_fpga_bitstream_artifact
0s
FPGA Suite (hw-latest, itrng, nolog) / build_kernel_modules
0s
FPGA Suite (hw-latest, itrng, nolog) / build_bitstream
0s
FPGA Suite (hw-latest, itrng, nolog) / cache_fpga_bitstream_artifact
0s
FPGA Suite (1.1, etrng, nolog) / build_kernel_modules
0s
FPGA Suite (1.1, etrng, nolog) / build_bitstream
0s
FPGA Suite (1.1, etrng, log) / build_bitstream
0s
FPGA Suite (1.1, etrng, log) / build_kernel_modules
0s
FPGA Suite (hw-latest, etrng, log) / build_bitstream
0s
FPGA Suite (hw-latest, etrng, log) / build_kernel_modules
0s
FPGA Suite (1.1, etrng, nolog) / cache_fpga_bitstream_artifact
0s
FPGA Suite (1.1, etrng, log) / cache_fpga_bitstream_artifact
0s
FPGA Suite (hw-latest, etrng, log) / cache_fpga_bitstream_artifact
0s
FPGA Suite (1.0, etrng, nolog) / test_artifacts
53m 57s
FPGA Suite (1.0, etrng, log) / test_artifacts
54m 19s
FPGA Suite (hw-latest, itrng, log) / test_artifacts
45m 7s
FPGA Suite (1.1, etrng, log) / test_artifacts
43m 41s
FPGA Suite (1.0, itrng, log) / test_artifacts
54m 42s
FPGA Suite (hw-latest, etrng, nolog) / test_artifacts
43m 35s
FPGA Suite (1.1, etrng, nolog) / test_artifacts
42m 56s
FPGA Suite (1.1, itrng, nolog) / test_artifacts
44m 29s
FPGA Suite (1.0, itrng, nolog) / test_artifacts
54m 20s
FPGA Suite (hw-latest, itrng, nolog) / test_artifacts
44m 33s
FPGA Suite (1.1, itrng, log) / test_artifacts
45m 1s
FPGA Suite (hw-latest, etrng, log) / test_artifacts
44m 3s
Create New Release
0s
Publish https://caliptra-sw.github.io/
0s
14h 30m 34s