Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

arm64: Instructions added in ARMv8.1/2 #1011

Conversation

semihalf-oleksy-michalina
Copy link
Contributor

PR as truafe asked.

I've noticed that some instructions added in ARMv8.1/2 are not supported yet.
I made changes in the files that could be edited manually yet I've seen several posts indicate that you edit some table gen files by hand and there is no public info on how to perform such changes.

I can do it myself in case I missed appropriate info - otherwise above I've linked to the branch that has them listed so that it would be easier for you to add new instructions.

(all the changes were based on arm manuals)

This commit adds handling of system registers added in ARMv8.2.
Those registers are accessed by mrs and msr instructions.
Changes based on https://static.docs.arm.com/ddi0487/b/DDI0487B_a_armv8_arm.pdf, chapters D7.2-5.

List of added registers:
id_mmfr4_el1
id_aa64mmfr2_el1
sctlr_el12
cpacr_el12
ttbr0_el12
ttbr1_el12
ttbr1_el2
tcr_el12
spsr_el12
elr_el12
afsr0_el12
afsr1_el12
esr_el12
far_el12
mair_el12
amair_el12
vbar_el12
cntkctl_el12
cnthv_ctl_el2
cnthv_cval_el2
cnthv_tval_el2
cntp_tval_el02
cntp_cval_el02
cntv_ctl_el02
ntv_cval_el02
cntv_tval_el02
lorid_el1
lorc_el1
lorea_el1
lorn_el1
lorsa_el1
contextidr_el12

sign-of: Michalina Oleksy (https://github.com/layika)
The list might be incomplete for now, also the changes don't work yet as there are autogenerated files missing and some mappings.
@aquynh
Copy link
Collaborator

aquynh commented Sep 11, 2017 via email

@semihalf-oleksy-michalina
Copy link
Contributor Author

semihalf-oleksy-michalina commented Sep 11, 2017

Sure I can. Do you mean something like A64SysReg_MDCCSR_EL0 = 0x9808, // 10 011 0000 0001 000 in registers?
What file should I edit to add hex input for instructions? (I can't find it myself, maybe I'm missing something).

@aquynh
Copy link
Collaborator

aquynh commented Sep 11, 2017

no, what i mean is that you can paste some sample instructions you added with hexcode here.
something like:

nop = 1f 20 03 d5

@aquynh
Copy link
Collaborator

aquynh commented Sep 11, 2017

btw, there is a conflict with arch/AArch64/AArch64BaseInfo.h. looks like you based on older code?

another thing: this PR is for the master branch. can you redo this by making a PR for the "next" branch instead?

@jdiamondGitHub
Copy link

Any news on the instruction updates? I didn't see any of the new names in the current master code. Also, is there support for Neon or SVE instruction in AARCH64?

@XVilka
Copy link
Contributor

XVilka commented May 22, 2018

@semihalf-oleksy-michalina ping? can you please update your PR? Would be awesome to have it in the 2.7.0 r2 release.

@XVilka
Copy link
Contributor

XVilka commented Sep 13, 2018

Ping?

@XVilka
Copy link
Contributor

XVilka commented Sep 13, 2018

Please also add support for ARMv8.3 instructions too https://community.arm.com/processors/b/blog/posts/armv8-a-architecture-2016-additions

@XVilka
Copy link
Contributor

XVilka commented Sep 13, 2018

And also ARMv8.4 https://reviews.llvm.org/D48625

@radare
Copy link
Contributor

radare commented Sep 18, 2018

it's pretty sad that this PR was open a year ago and there are still no ways to get in sync with latest llvm, or even was merged. How long should we wait if the project can't keep in sync with llvm and hasnt been any release in more than 3 years to consider Capstone dead?

@blacktop
Copy link
Contributor

And also ARMv8.5 - https://community.arm.com/processors/b/blog/posts/arm-a-profile-architecture-2018-developments-armv85a

I ❤️ Capstone

@E3V3A
Copy link

E3V3A commented Oct 21, 2018

@radare

it's pretty sad that this PR was open a year ago and there are still no ways to get in sync with latest llvm, or even was merged. How long should we wait if the project can't keep in sync with llvm and hasnt been any release in more than 3 years to consider Capstone dead?

It may very well be that @aquynh has tired being the lone maintainer of this great but free project.
Perhaps he should add a BIG tag in the GitHub README asking for maintenance help?

@radare
Copy link
Contributor

radare commented Oct 23, 2018 via email

@blacktop
Copy link
Contributor

Let's get this shizz merged in ya'll. Please see this #1287

@XVilka
Copy link
Contributor

XVilka commented Nov 15, 2018

@blacktop beware that it makes sense to add 8.4 and 8.5 while you are on it: https://github.com/llvm-mirror/llvm/search?q=%5BAArch64%5D%5Bv8.5A%5D&type=Commits

@aquynh
Copy link
Collaborator

aquynh commented Nov 19, 2018

i cleaned up this to solve some conflicts, and merged into the https://github.com/aquynh/capstone/tree/arm64 branch. look closer, i think something is not right: this adds some new instructions, but also all the variations. for example, perhaps some of the below instructions can map into one, reducing number of instructions we will support?

    ARM64_INS_LDEORB,
    ARM64_INS_LDEORAB,
    ARM64_INS_LDEORALB,
    ARM64_INS_LDEORLB,
    ARM64_INS_LDEORH,
    ARM64_INS_LDEORAH,
    ARM64_INS_LDEORALH,
    ARM64_INS_LDEORLH,
    ARM64_INS_LDEOR,
    ARM64_INS_LDEORA,
    ARM64_INS_LDEORAL,
    ARM64_INS_LDEORL,

also, this removes ARM64_INS_NEGS & ARM64_INS_NGCS?

@aquynh
Copy link
Collaborator

aquynh commented Nov 19, 2018

this adds some new instructions, but does not update the core logic to handle them, so i doubt that this is a complete work.

@aquynh
Copy link
Collaborator

aquynh commented May 13, 2019

supported now in the next branch, thanks.

@aquynh aquynh closed this May 13, 2019
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
None yet
Projects
None yet
Development

Successfully merging this pull request may close these issues.

7 participants