Merge branch 'develop/aurora_sup' into 'production'

Extension of 100GbE test app for support of Aurora DMA IP.

See merge request meep/FPGA_implementations/AlveoU280/meep_openpiton!109

piton/design/chipset/meep_shell/accelerator_def.csv

@@ -11,7 +11,7 @@ HBM,no,mcx_axi4,AXI3-256,CLK0,0x0,mem_calib_complete,08
 HBM,no,mcx_axi5,AXI3-256,CLK0,0x0,mem_calib_complete,09
 HBM,no,mcx_axi6,AXI3-256,CLK0,0x0,mem_calib_complete,10
 HBM,no,mcx_axi7,AXI3-256,CLK0,0x0,mem_calib_complete,11
-AURORA,no,aur_axi,AXI4LITE-64,CLK0,dma,aur_irq,qsfp1,,26
+AURORA,no,eth_axi,AXI4LITE-64,CLK0,dma,eth_irq,qsfp1,hbm,13
 UART,yes,uart_axi,,CLK0,0x0,normal,uart_irq
 ETHERNET,yes,eth_axi,AXI4LITE-64,CLK0,100Gb,eth_irq,qsfp1,hbm,29
 BROM,no,sram_axi,,CLK0,0x0,initFile.mem

piton/design/chipset/xilinx/alveou280/ip_cores/eth_cmac_syst/sw/eth_test/build/build_app.sh

@@ -13,12 +13,18 @@ cp $XILINX_VITIS/data/embeddedsw/XilinxProcessorIPLib/drivers/axidma_v9_13/src/x
 sed -i 's|#define XPAR_AXIDMA_0_INCLUDE_SG|//#define XPAR_AXIDMA_0_INCLUDE_SG|g' ./xaxidma_g.c
 
 echo "----- Checking if hw is implemented under MEEP_SHELL:"
-if grep "ETHERNET.*hbm" ../../../../../../../../../../meep_shell/accelerator_def.csv
+# SG_MEM_CACHED and TXRX_MEM_CACHED defines are suitable only for Ariane-based design
+# DEF_DMA_MEM_HBM="-DDMA_MEM_HBM -DSG_MEM_CACHED -DTXRX_MEM_CACHED"
+if grep "ETHERNET,yes.*hbm" ../../../../../../../../../../meep_shell/accelerator_def.csv
 then
   echo "----- Eth DMA memory is HBM-based in hw design, setting its addresses accordingly"
-  DEF_DMA_MEM_HBM="-DDMA_MEM_HBM -DSG_MEM_CACHED -DTXRX_MEM_CACHED"
+  DEF_DMA_MEM_HBM="-DDMA_MEM_HBM"
+elif grep "AURORA,yes.*hbm" ../../../../../../../../../../meep_shell/accelerator_def.csv
+then
+  echo "----- Aurora DMA memory is HBM-based in hw design, setting its addresses accordingly"
+  DEF_DMA_MEM_HBM="-DAURORA -DDMA_MEM_HBM"
 else
-  echo "----- Eth DMA memory is SRAM-based in hw design, setting its addresses accordingly"
+  echo "----- Eth/Aurora DMA memory is SRAM-based in hw design, setting its addresses accordingly"
   DEF_DMA_MEM_HBM=""
 fi
 echo ""

piton/design/chipset/xilinx/alveou280/ip_cores/eth_cmac_syst/sw/eth_test/src/app/eth_test.cpp

@@ -46,8 +46,14 @@ int main(int argc, char *argv[])
         DMA_AXI_BURST = ETH_WORD_SIZE * std::max(XPAR_AXI_DMA_0_MM2S_BURST_SIZE, // the parameter set in Vivado AXI_DMA IP
                                                  XPAR_AXI_DMA_0_S2MM_BURST_SIZE),
         DMA_PACKET_LEN   = txrxMemSize/3     - sizeof(uint32_t), // the parameter to play with (no issies met for any values and granularities)
+      #ifdef AURORA
+        AUR_WORD_SIZE    = ETH_WORD_SIZE/2,
+        ETH_PACKET_LEN   = AUR_WORD_SIZE*220, // the parameter to play with: for Aurora that is the figured out non-failing maximum frame length, should be aligned to AUR_WORD_SIZE
+      #else
         ETH_PACKET_LEN   = ETH_WORD_SIZE*150 - sizeof(uint32_t), // the parameter to play with (no issues met for granularity=sizeof(uint32_t) and range=[(1...~150)*ETH_WORD_SIZE]
                                                                  // (defaults in Eth100Gb IP as min/max packet length=64...9600(but only upto 9596 works)))
+      #endif
+
       #ifdef DMA_MEM_HBM
         ETH_MEMPACK_SIZE = ETH_PACKET_LEN
       #else
@@ -70,7 +76,11 @@ int main(int argc, char *argv[])
   while (true) {
 
     printf("\n");
-    printf("------ Ethernet Test App ------\n");
+    #ifdef AURORA
+      printf("------ Aurora Test App ------\n");
+    #else
+      printf("------ Ethernet Test App ------\n");
+    #endif
     printf("Please enter test mode:\n");
     printf("  Single board self-diag/loopback tests: l\n");
     printf("  Two boards diag communication tests:   c\n");
@@ -485,6 +495,10 @@ int main(int argc, char *argv[])
         printf("------- System SRAM memcpy() bandwidth measurement PASSED -------\n\n");
 
 
+        #ifdef AURORA
+        // running Aurora reset here in order to bring-up GT clocks powering the DMA
+        ethSyst.aurCoreBringup(true);  // loopback mode
+        #endif
         ethSyst.axiDmaInit();
         ethSyst.switch_LB_DMA_Eth(true,  true); // Tx switch: DMA->LB, LB->Eth
         ethSyst.switch_LB_DMA_Eth(false, true); // Rx switch: LB->DMA, Eth->LB
@@ -557,11 +571,15 @@ int main(int argc, char *argv[])
         }
         printf("------- DMA Short Loopback test PASSED -------\n\n");
 
+        #ifndef AURORA
         ethSyst.ethCoreInit();
         ethSyst.ethCoreBringup(true);  // loopback mode
+        #endif
         ethSyst.switch_LB_DMA_Eth(true,  false); // Tx switch: DMA->Eth, Eth LB->DMA LB
         ethSyst.switch_LB_DMA_Eth(false, false); // Rx switch: Eth->DMA, DMA LB->Eth LB
+        #ifndef AURORA
         ethSyst.ethTxRxEnable(); // Enabling Ethernet TX/RX
+        #endif
         sleep(1); // in seconds
 
         printf("------- Running DMA Near-end loopback test -------\n");
@@ -651,7 +669,9 @@ int main(int argc, char *argv[])
           }
         }
 
+        #ifndef AURORA
         ethSyst.ethTxRxDisable(); //Disabling Ethernet TX/RX
+        #endif
         printf("------- DMA Near-end loopback test PASSED -------\n\n");
 
       }
@@ -661,18 +681,27 @@ int main(int argc, char *argv[])
       case 'c': {
         printf("------- Running 2-boards communication test -------\n");
         printf("Please make sure that the same mode is running on the other side and confirm with 'y'...\n");
+        #ifdef AURORA
+        ethSyst.aurDisable(); //Disabling Aurora
+        #endif
         char confirm;
         scanf("%s", &confirm);
         printf("%c\n", confirm);
         if (confirm != 'y') break;
 
         ethSyst.timerCntInit(); // initializing Timer
+        #ifdef AURORA
+        ethSyst.aurCoreBringup(false);  // loopback mode
+        #else
         ethSyst.ethCoreInit();
         ethSyst.ethCoreBringup(false); // non-loopback mode
+        #endif
         ethSyst.axiDmaInit();
         ethSyst.switch_LB_DMA_Eth(true,  false); // Tx switch: DMA->Eth, Eth LB->DMA LB
         ethSyst.switch_LB_DMA_Eth(false, false); // Rx switch: Eth->DMA, DMA LB->Eth LB
+        #ifndef AURORA
         ethSyst.ethTxRxEnable(); // Enabling Ethernet TX/RX
+        #endif
         sleep(1); // in seconds
 
         printf("------- Async DMA 2-boards communication test -------\n");
@@ -690,7 +719,7 @@ int main(int argc, char *argv[])
           packets = std::min(packets,
                     std::min(ethSyst.txBdCount,
                              ethSyst.rxBdCount));
-      #ifdef DMA_MEM_HBM
+      #if defined(DMA_MEM_HBM) && !defined(AURORA)
         size_t txBunch = packets;
       #else
         size_t txBunch = ETH_PACKET_LEN > ETH_WORD_SIZE*4 ? 1 : packets; // whole bunch Tx kick-off for small packets
@@ -781,7 +810,7 @@ int main(int argc, char *argv[])
           packets = std::min(packets,
                     std::min(ethSyst.txBdCount,
                              ethSyst.rxBdCount));
-      #ifdef DMA_MEM_HBM
+      #if defined(DMA_MEM_HBM) && !defined(AURORA)
         txBunch = packets;
       #else
         txBunch = ETH_PACKET_LEN > ETH_WORD_SIZE*4 ? 1 : packets; // whole bunch Tx kick-off for small packets
@@ -866,13 +895,19 @@ int main(int argc, char *argv[])
           }
         }
 
+        #ifndef AURORA
         ethSyst.ethTxRxDisable(); //Disabling Ethernet TX/RX
+        #endif
         printf("------- Round-trip DMA 2-boards communication test PASSED -------\n\n");
       }
       break;
 
 
       case 'i': {
+        #ifdef AURORA
+          printf("------- IP-based tests are not applicable for Aurora -------\n");
+          break;
+        #endif
         printf("------- Running 2-boards IP-based tests -------\n");
         printf("Please make sure that the same mode is running on the other side and confirm with 'y'...\n");
         char confirm;
@@ -984,6 +1019,10 @@ int main(int argc, char *argv[])
       break;
 
       case 's': {
+        #ifdef AURORA
+          printf("------- Ethernet link setup is not applicable for Aurora -------\n");
+          break;
+        #endif
         printf("------- Ethernet link setup -------\n");
         ethSyst.ethCoreInit();
         ethSyst.switch_LB_DMA_Eth(true,  false); // Tx switch: DMA->Eth, Eth LB->DMA LB

piton/design/chipset/xilinx/alveou280/ip_cores/eth_cmac_syst/sw/eth_test/src/syst_hw/EthSyst.cpp

@@ -307,6 +307,53 @@ void EthSyst::ethCoreBringup(bool gtLoopback) {
 }
 
 
+//***************** Bring-up of Aurora Core *****************
+void EthSyst::aurCoreBringup(bool gtLoopback) {
+  printf("------- Aurora Core bring-up -------\n");
+  printf("Status: %0X \n", gtCtrl[GT_CTRL]);
+
+  if (gtLoopback) {
+    printf("Enabling Near-End PMA Loopback\n");
+    aurLbMode = 0x2; // via GPIO: http://www.xilinx.com/support/documentation/user_guides/ug578-ultrascale-gty-transceivers.pdf#page=88
+  } else {
+    printf("Enabling GT normal operation with no loopback\n");
+    aurLbMode = 0;
+  }
+
+  printf("Applying Aurora and GT resets\n");
+  gtCtrl[GT_CTRL] = aurLbMode + 0x60;
+  printf("Status: %0X \n", gtCtrl[GT_CTRL]);
+  sleep(1); // in seconds, user wait process
+  printf("Status: %0X \n", gtCtrl[GT_CTRL]);
+  printf("Releasing GT reset\n");
+  gtCtrl[GT_CTRL] = aurLbMode + 0x20;
+  printf("Status: %0X \n", gtCtrl[GT_CTRL]);
+  printf("Status: %0X \n", gtCtrl[GT_CTRL]);
+  printf("Releasing Aurora reset\n");
+  gtCtrl[GT_CTRL] = aurLbMode;
+  printf("Status: %0X \n", gtCtrl[GT_CTRL]);
+
+  printf("\n");
+
+  physConnOrder = PHYS_CONN_WAIT_INI;
+
+  enum {AUR_UP_STATE = 0x1F5F};                                                 
+  printf("Waiting for Power, Clocks, Lanes and Channel are up: %0X ...\n", AUR_UP_STATE);
+  // https://docs.xilinx.com/r/en-US/pg074-aurora-64b66b/Status-Control-and-Transceiver-Ports
+  // [3:0]-gt_powergood[3:0], [4]-gt_pll_lock, [6]-gt_qplllock_quad1_out, [11:8]-lane_up[3:0], [9]-channel_up
+  while(gtCtrl[GT_CTRL] != AUR_UP_STATE) {
+    printf("Status: %0X \n", gtCtrl[GT_CTRL]);
+    if (physConnOrder) physConnOrder--;
+    sleep(1); // in seconds, user wait process
+  }
+  printf("Status: %0X \n", gtCtrl[GT_CTRL]);
+
+  printf("This Aurora instance is physically connected in order (zero means 1st, non-zero means 2nd): %d \n", physConnOrder);
+  printf("------- Physical connection is established -------\n");
+  printf("\n");
+}
+
+
 //***************** Enabling Ethernet core Tx/Rx *****************
 void EthSyst::ethTxRxEnable() {
   printf("Enabling Ethernet TX/RX:\n");
@@ -335,6 +382,15 @@ void EthSyst::ethTxRxDisable() {
 }
 
 
+//***************** Disabling Aurora core *****************
+void EthSyst::aurDisable() {
+  printf("Disabling Aurora:\n");
+  printf("Status: %0X \n", gtCtrl[GT_CTRL]);
+  gtCtrl[GT_CTRL] = aurLbMode + 0x10;
+  printf("Status: %0X \n", gtCtrl[GT_CTRL]);
+}
+
+
 //***************** Initialization of Timer *****************
 void EthSyst::timerCntInit() {
   // AXI Timer direct control: http://www.xilinx.com/support/documentation/ip_documentation/axi_timer/v2_0/pg079-axi-timer.pdf

piton/design/chipset/xilinx/alveou280/ip_cores/eth_cmac_syst/sw/eth_test/src/syst_hw/EthSyst.h

@@ -219,7 +219,8 @@ class EthSyst {
     GT_LOOPBACK_REG       = GT_LOOPBACK_REG_OFFSET       / sizeof(uint32_t)
   };
   uint32_t volatile* rxtxCtrl; // Ethernet core control via pins
-  uint32_t volatile* gtCtrl;   // GT control via pins 
+  uint32_t volatile* gtCtrl;   // GT control via pins
+  uint8_t aurLbMode = 0; // storage of loopback mode for Aurora
   enum {
     TX_CTRL = XGPIO_DATA_OFFSET  / sizeof(uint32_t),
     RX_CTRL = XGPIO_DATA2_OFFSET / sizeof(uint32_t),
@@ -302,6 +303,8 @@ class EthSyst {
   void ethCoreBringup(bool);
   void ethTxRxEnable();
   void ethTxRxDisable();
+  void aurCoreBringup(bool);
+  void aurDisable();
 
   void axiDmaInit();
   XAxiDma_Bd* dmaBDAlloc   (bool, size_t, size_t, size_t, size_t);