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duckstation: Fix build on aarch64-linux (NixOS#373182)
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Original file line number | Diff line number | Diff line change |
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@@ -0,0 +1,70 @@ | ||
From 19e094e5c7aaaf375a13424044521701e85c8313 Mon Sep 17 00:00:00 2001 | ||
From: OPNA2608 <[email protected]> | ||
Date: Thu, 9 Jan 2025 17:46:25 +0100 | ||
Subject: [PATCH] Fix usage of NEON intrinsics | ||
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||
--- | ||
src/common/gsvector_neon.h | 12 ++++++------ | ||
1 file changed, 6 insertions(+), 6 deletions(-) | ||
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diff --git a/src/common/gsvector_neon.h b/src/common/gsvector_neon.h | ||
index e4991af5e..61b8dc09b 100644 | ||
--- a/src/common/gsvector_neon.h | ||
+++ b/src/common/gsvector_neon.h | ||
@@ -867,7 +867,7 @@ public: | ||
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ALWAYS_INLINE int mask() const | ||
{ | ||
- const uint32x2_t masks = vshr_n_u32(vreinterpret_u32_s32(v2s), 31); | ||
+ const uint32x2_t masks = vshr_n_u32(vreinterpret_u32_f32(v2s), 31); | ||
return (vget_lane_u32(masks, 0) | (vget_lane_u32(masks, 1) << 1)); | ||
} | ||
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||
@@ -2882,7 +2882,7 @@ public: | ||
ALWAYS_INLINE GSVector4 gt64(const GSVector4& v) const | ||
{ | ||
#ifdef CPU_ARCH_ARM64 | ||
- return GSVector4(vreinterpretq_f32_f64(vcgtq_f64(vreinterpretq_f64_f32(v4s), vreinterpretq_f64_f32(v.v4s)))); | ||
+ return GSVector4(vreinterpretq_f32_u64(vcgtq_f64(vreinterpretq_f64_f32(v4s), vreinterpretq_f64_f32(v.v4s)))); | ||
#else | ||
GSVector4 ret; | ||
ret.U64[0] = (F64[0] > v.F64[0]) ? 0xFFFFFFFFFFFFFFFFULL : 0; | ||
@@ -2894,7 +2894,7 @@ public: | ||
ALWAYS_INLINE GSVector4 eq64(const GSVector4& v) const | ||
{ | ||
#ifdef CPU_ARCH_ARM64 | ||
- return GSVector4(vreinterpretq_f32_f64(vceqq_f64(vreinterpretq_f64_f32(v4s), vreinterpretq_f64_f32(v.v4s)))); | ||
+ return GSVector4(vreinterpretq_f32_u64(vceqq_f64(vreinterpretq_f64_f32(v4s), vreinterpretq_f64_f32(v.v4s)))); | ||
#else | ||
GSVector4 ret; | ||
ret.U64[0] = (F64[0] == v.F64[0]) ? 0xFFFFFFFFFFFFFFFFULL : 0; | ||
@@ -2906,7 +2906,7 @@ public: | ||
ALWAYS_INLINE GSVector4 lt64(const GSVector4& v) const | ||
{ | ||
#ifdef CPU_ARCH_ARM64 | ||
- return GSVector4(vreinterpretq_f32_f64(vcgtq_f64(vreinterpretq_f64_f32(v4s), vreinterpretq_f64_f32(v.v4s)))); | ||
+ return GSVector4(vreinterpretq_f32_u64(vcgtq_f64(vreinterpretq_f64_f32(v4s), vreinterpretq_f64_f32(v.v4s)))); | ||
#else | ||
GSVector4 ret; | ||
ret.U64[0] = (F64[0] < v.F64[0]) ? 0xFFFFFFFFFFFFFFFFULL : 0; | ||
@@ -2918,7 +2918,7 @@ public: | ||
ALWAYS_INLINE GSVector4 ge64(const GSVector4& v) const | ||
{ | ||
#ifdef CPU_ARCH_ARM64 | ||
- return GSVector4(vreinterpretq_f32_f64(vcgeq_f64(vreinterpretq_f64_f32(v4s), vreinterpretq_f64_f32(v.v4s)))); | ||
+ return GSVector4(vreinterpretq_f32_u64(vcgeq_f64(vreinterpretq_f64_f32(v4s), vreinterpretq_f64_f32(v.v4s)))); | ||
#else | ||
GSVector4 ret; | ||
ret.U64[0] = (F64[0] >= v.F64[0]) ? 0xFFFFFFFFFFFFFFFFULL : 0; | ||
@@ -2930,7 +2930,7 @@ public: | ||
ALWAYS_INLINE GSVector4 le64(const GSVector4& v) const | ||
{ | ||
#ifdef CPU_ARCH_ARM64 | ||
- return GSVector4(vreinterpretq_f32_f64(vcleq_f64(vreinterpretq_f64_f32(v4s), vreinterpretq_f64_f32(v.v4s)))); | ||
+ return GSVector4(vreinterpretq_f32_u64(vcleq_f64(vreinterpretq_f64_f32(v4s), vreinterpretq_f64_f32(v.v4s)))); | ||
#else | ||
GSVector4 ret; | ||
ret.U64[0] = (F64[0] <= v.F64[0]) ? 0xFFFFFFFFFFFFFFFFULL : 0; | ||
-- | ||
2.47.0 | ||
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