Adds locking to Tiva SPIFFs. (#573)

* Fixes a missing initialization in the SPIFFS driver.

* Switches on write locking for flash writes using basepri.

* Makes the locking configurable.

* Adds locking choice.

src/freertos_drivers/spiffs/SPIFFS.cxx

@@ -117,6 +117,7 @@ SPIFFS::SPIFFS(size_t physical_address, size_t size_on_disk,
     , anyDirty_(false)
 {
     fs_ = new spiffs;
+    memset(fs_, 0, sizeof(spiffs));
     fs_->user_data = this;
     spiffs_config tmp{  //
         .hal_read_f       = flash_read,

src/freertos_drivers/spiffs/cc32x0sf/CC32x0SFSPIFFS.cxx

@@ -35,6 +35,7 @@
 #define USE_CC3220_ROM_DRV_API
 
 #define TI_DUAL_BANK_FLASH
+#define TISPIFFS_LOCK_NONE
 
 #include "spiffs.h"
 #include "inc/hw_types.h"

src/freertos_drivers/spiffs/cc32x0sf/TiSPIFFSImpl.hxx

@@ -60,28 +60,74 @@ static constexpr unsigned addr_mirror = 0;
 // needed to debug when the operating system is misbehaving during flash
 // writes.
 
+#if defined(TISPIFFS_LOCK_ALL_INTERRUPTS)
+
 // Global disable interrupts.
-//
-// #define DI() asm("cpsid i\n")
-// #define EI() asm("cpsie i\n")
+
+#define DI() asm("cpsid i\n")
+#define EI() asm("cpsie i\n")
+
+#elif defined(TISPIFFS_LOCK_CRITICAL)
 
 // Critical section (interrupts better than MIN_SYSCALL_PRIORITY are still
 // running).
-//
-// #define DI() portENTER_CRITICAL()
-// #define EI() portEXIT_CRITICAL()
 
-// Disable interrupts with a custom priority limit (must not be zero).
-//
-// unsigned ppri;
-// constexpr unsigned minpri = 0x40;
-// #define DI() ppri = CPUbasepriGet(); CPUbasepriSet(minpri); HWREG(FLASH_CONF) |=  0x20110000;
-// #define EI() CPUbasepriSet(ppri);
+#define DI() portENTER_CRITICAL()
+#define EI() portEXIT_CRITICAL()
+
+#elif defined(TISPIFFS_LOCK_BASEPRI_FF)
+
+// Disable interrupts with a priority limit of 0xFF (these are the lowest
+// priority interrupts, including the FreeRTOS kernel task switch interrupt).
+unsigned ppri;
+constexpr unsigned minpri = 0xFF;
+#define DI()                                                                   \
+    do                                                                         \
+    {                                                                          \
+        unsigned r;                                                            \
+        __asm volatile(" mrs %0, basepri\n mov %1, %2\n msr basepri, %1\n"     \
+                       : "=r"(ppri), "=r"(r)                                   \
+                       : "i"(minpri)                                           \
+                       : "memory");                                            \
+    } while (0)
+#define EI() __asm volatile(" msr basepri, %0\n" : : "r"(ppri) : "memory")
+
+#elif defined(TISPIFFS_LOCK_NOTICK)
+
+// Disable the systick timer to prevent preemptive multi-tasking from changing
+// to a different task.
+
+static constexpr unsigned SYSTICKCFG = 0xE000E010;
+#define DI() HWREG(SYSTICKCFG) &= ~2;
+#define EI() HWREG(SYSTICKCFG) |= 2;
+
+#elif defined(TISPIFFS_LOCK_SCHEDULER_SUSPEND)
+
+// Disable freertos scheduler
+
+#define DI() vTaskSuspendAll()
+#define EI() xTaskResumeAll()
+
+#elif defined(TISPIFFS_LOCK_NONE)
 
 // No write locking.
+
 #define DI()
 #define EI()
 
+#elif defined(TISPIFFS_LOCK_CRASH)
+
+// Crashes if two different executions of this locking mechanism are
+// concurrent.
+
+unsigned pend = 0;
+#define DI() HASSERT(pend==0); pend=1;
+#define EI() pend=0;
+
+#else
+#error Must specify what kind of locking to use for TISPIFFS.
+#endif
+
 // This ifdef decides whether we use the ROM or the flash based implementations
 // for Flash write and erase. It also supports correcting for the reversed bank
 // addresses.

src/freertos_drivers/spiffs/tm4c129/TM4C129xSPIFFS.cxx

@@ -35,6 +35,7 @@
 #define TARGET_IS_TM4C129_RA1
 
 #define TI_DUAL_BANK_FLASH
+#define TISPIFFS_LOCK_BASEPRI_FF
 
 #include "spiffs.h"
 #include "inc/hw_types.h"