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Remove unreachable-code
feature
#9463
Conversation
e2b59d3
to
d30b5f9
Compare
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code | total | + violation | - violation | + fix | - fix |
---|---|---|---|---|---|
ANN101 | 1023 | 1023 | 0 | 0 | 0 |
ANN001 | 837 | 837 | 0 | 0 | 0 |
S101 | 642 | 642 | 0 | 0 | 0 |
ANN201 | 601 | 601 | 0 | 0 | 0 |
COM812 | 397 | 397 | 0 | 0 | 0 |
PLR6301 | 304 | 304 | 0 | 0 | 0 |
PLC0415 | 249 | 249 | 0 | 0 | 0 |
TRY003 | 232 | 232 | 0 | 0 | 0 |
ANN202 | 229 | 229 | 0 | 0 | 0 |
D102 | 210 | 210 | 0 | 0 | 0 |
D212 | 193 | 193 | 0 | 0 | 0 |
RUF014 | 143 | 0 | 143 | 0 | 0 |
ANN003 | 142 | 142 | 0 | 0 | 0 |
EM101 | 127 | 127 | 0 | 0 | 0 |
FBT001 | 126 | 126 | 0 | 0 | 0 |
D107 | 123 | 123 | 0 | 0 | 0 |
PLR0913 | 119 | 119 | 0 | 0 | 0 |
RUF012 | 118 | 118 | 0 | 0 | 0 |
ARG002 | 118 | 118 | 0 | 0 | 0 |
EM102 | 110 | 110 | 0 | 0 | 0 |
ARG001 | 101 | 101 | 0 | 0 | 0 |
E265 | 100 | 100 | 0 | 0 | 0 |
Q000 | 94 | 94 | 0 | 0 | 0 |
RET505 | 93 | 93 | 0 | 0 | 0 |
PLR0917 | 92 | 92 | 0 | 0 | 0 |
SLF001 | 83 | 83 | 0 | 0 | 0 |
TID252 | 81 | 81 | 0 | 0 | 0 |
PLR2004 | 80 | 80 | 0 | 0 | 0 |
D210 | 79 | 79 | 0 | 0 | 0 |
D401 | 76 | 76 | 0 | 0 | 0 |
ANN401 | 73 | 73 | 0 | 0 | 0 |
E402 | 72 | 72 | 0 | 0 | 0 |
T201 | 71 | 71 | 0 | 0 | 0 |
D300 | 69 | 69 | 0 | 0 | 0 |
PT007 | 67 | 67 | 0 | 0 | 0 |
Q002 | 65 | 65 | 0 | 0 | 0 |
PLR6201 | 58 | 58 | 0 | 0 | 0 |
FA100 | 56 | 56 | 0 | 0 | 0 |
AIR001 | 54 | 54 | 0 | 0 | 0 |
FBT002 | 48 | 48 | 0 | 0 | 0 |
ANN102 | 48 | 48 | 0 | 0 | 0 |
ANN204 | 46 | 46 | 0 | 0 | 0 |
D103 | 45 | 45 | 0 | 0 | 0 |
RET506 | 44 | 44 | 0 | 0 | 0 |
CPY001 | 43 | 43 | 0 | 0 | 0 |
TD003 | 43 | 43 | 0 | 0 | 0 |
D407 | 42 | 42 | 0 | 0 | 0 |
TD002 | 41 | 41 | 0 | 0 | 0 |
FIX002 | 38 | 38 | 0 | 0 | 0 |
C901 | 37 | 37 | 0 | 0 | 0 |
ANN002 | 33 | 33 | 0 | 0 | 0 |
RET503 | 33 | 33 | 0 | 0 | 0 |
PLW2901 | 32 | 32 | 0 | 0 | 0 |
D205 | 31 | 31 | 0 | 0 | 0 |
BLE001 | 27 | 27 | 0 | 0 | 0 |
FBT003 | 26 | 26 | 0 | 0 | 0 |
SIM300 | 26 | 26 | 0 | 0 | 0 |
C408 | 25 | 25 | 0 | 0 | 0 |
PT006 | 24 | 24 | 0 | 0 | 0 |
ERA001 | 23 | 23 | 0 | 0 | 0 |
B904 | 22 | 22 | 0 | 0 | 0 |
TRY200 | 22 | 22 | 0 | 0 | 0 |
PGH003 | 21 | 21 | 0 | 0 | 0 |
D100 | 20 | 20 | 0 | 0 | 0 |
TRY002 | 20 | 20 | 0 | 0 | 0 |
PLR0912 | 20 | 20 | 0 | 0 | 0 |
D200 | 19 | 19 | 0 | 0 | 0 |
PTH118 | 17 | 17 | 0 | 0 | 0 |
PLR0914 | 16 | 16 | 0 | 0 | 0 |
A002 | 16 | 16 | 0 | 0 | 0 |
PLR0915 | 16 | 16 | 0 | 0 | 0 |
PT004 | 16 | 16 | 0 | 0 | 0 |
B028 | 15 | 15 | 0 | 0 | 0 |
PTH123 | 15 | 15 | 0 | 0 | 0 |
D202 | 14 | 14 | 0 | 0 | 0 |
D404 | 13 | 13 | 0 | 0 | 0 |
PLR0904 | 13 | 13 | 0 | 0 | 0 |
PLW1514 | 13 | 13 | 0 | 0 | 0 |
PTH110 | 13 | 13 | 0 | 0 | 0 |
PLC2801 | 12 | 12 | 0 | 0 | 0 |
RET504 | 12 | 12 | 0 | 0 | 0 |
ANN205 | 12 | 12 | 0 | 0 | 0 |
PT001 | 11 | 11 | 0 | 0 | 0 |
E261 | 11 | 11 | 0 | 0 | 0 |
E721 | 11 | 11 | 0 | 0 | 0 |
PLW3201 | 10 | 10 | 0 | 0 | 0 |
SIM108 | 10 | 10 | 0 | 0 | 0 |
PLR0911 | 10 | 10 | 0 | 0 | 0 |
S603 | 9 | 9 | 0 | 0 | 0 |
PLR5501 | 9 | 9 | 0 | 0 | 0 |
A003 | 9 | 9 | 0 | 0 | 0 |
RSE102 | 9 | 9 | 0 | 0 | 0 |
E225 | 9 | 9 | 0 | 0 | 0 |
D415 | 8 | 8 | 0 | 0 | 0 |
N806 | 8 | 8 | 0 | 0 | 0 |
PLR1711 | 8 | 8 | 0 | 0 | 0 |
A001 | 8 | 8 | 0 | 0 | 0 |
TRY004 | 8 | 8 | 0 | 0 | 0 |
D101 | 8 | 8 | 0 | 0 | 0 |
S607 | 7 | 7 | 0 | 0 | 0 |
S404 | 7 | 7 | 0 | 0 | 0 |
D105 | 7 | 7 | 0 | 0 | 0 |
SIM102 | 7 | 7 | 0 | 0 | 0 |
S113 | 7 | 7 | 0 | 0 | 0 |
ANN206 | 7 | 7 | 0 | 0 | 0 |
DTZ003 | 7 | 7 | 0 | 0 | 0 |
D400 | 7 | 7 | 0 | 0 | 0 |
E231 | 7 | 7 | 0 | 0 | 0 |
TD004 | 6 | 6 | 0 | 0 | 0 |
TRY400 | 6 | 6 | 0 | 0 | 0 |
N801 | 6 | 6 | 0 | 0 | 0 |
PTH120 | 6 | 6 | 0 | 0 | 0 |
F841 | 6 | 6 | 0 | 0 | 0 |
PT023 | 6 | 6 | 0 | 0 | 0 |
PT018 | 6 | 6 | 0 | 0 | 0 |
PLR1704 | 5 | 5 | 0 | 0 | 0 |
B010 | 5 | 5 | 0 | 0 | 0 |
RET501 | 5 | 5 | 0 | 0 | 0 |
TRY201 | 5 | 5 | 0 | 0 | 0 |
FURB101 | 5 | 5 | 0 | 0 | 0 |
TD001 | 5 | 5 | 0 | 0 | 0 |
PTH207 | 5 | 5 | 0 | 0 | 0 |
PLR0916 | 5 | 5 | 0 | 0 | 0 |
D419 | 5 | 5 | 0 | 0 | 0 |
E226 | 5 | 5 | 0 | 0 | 0 |
D417 | 4 | 4 | 0 | 0 | 0 |
TD006 | 4 | 4 | 0 | 0 | 0 |
PLC1901 | 4 | 4 | 0 | 0 | 0 |
DTZ005 | 4 | 4 | 0 | 0 | 0 |
PLR1714 | 4 | 4 | 0 | 0 | 0 |
TRY300 | 4 | 4 | 0 | 0 | 0 |
PLW0603 | 4 | 4 | 0 | 0 | 0 |
B009 | 4 | 4 | 0 | 0 | 0 |
G004 | 4 | 4 | 0 | 0 | 0 |
D406 | 4 | 4 | 0 | 0 | 0 |
PT012 | 4 | 4 | 0 | 0 | 0 |
ARG005 | 4 | 4 | 0 | 0 | 0 |
PD011 | 4 | 4 | 0 | 0 | 0 |
E501 | 3 | 3 | 0 | 0 | 0 |
PERF203 | 3 | 3 | 0 | 0 | 0 |
PTH107 | 3 | 3 | 0 | 0 | 0 |
B007 | 3 | 3 | 0 | 0 | 0 |
FIX003 | 3 | 3 | 0 | 0 | 0 |
PTH111 | 3 | 3 | 0 | 0 | 0 |
SIM117 | 3 | 3 | 0 | 0 | 0 |
DTZ001 | 3 | 3 | 0 | 0 | 0 |
S403 | 3 | 3 | 0 | 0 | 0 |
PLW0108 | 3 | 3 | 0 | 0 | 0 |
B015 | 3 | 3 | 0 | 0 | 0 |
ARG004 | 3 | 3 | 0 | 0 | 0 |
PIE790 | 3 | 3 | 0 | 0 | 0 |
UP035 | 3 | 3 | 0 | 0 | 0 |
TCH001 | 3 | 3 | 0 | 0 | 0 |
B006 | 3 | 3 | 0 | 0 | 0 |
E201 | 3 | 3 | 0 | 0 | 0 |
E202 | 3 | 3 | 0 | 0 | 0 |
D412 | 3 | 3 | 0 | 0 | 0 |
RUF021 | 2 | 2 | 0 | 0 | 0 |
SIM118 | 2 | 2 | 0 | 0 | 0 |
D418 | 2 | 2 | 0 | 0 | 0 |
PLR1706 | 2 | 2 | 0 | 0 | 0 |
DTZ006 | 2 | 2 | 0 | 0 | 0 |
PERF401 | 2 | 2 | 0 | 0 | 0 |
N818 | 2 | 2 | 0 | 0 | 0 |
FIX001 | 2 | 2 | 0 | 0 | 0 |
N817 | 2 | 2 | 0 | 0 | 0 |
ARG003 | 2 | 2 | 0 | 0 | 0 |
PTH112 | 2 | 2 | 0 | 0 | 0 |
PTH116 | 2 | 2 | 0 | 0 | 0 |
PTH101 | 2 | 2 | 0 | 0 | 0 |
PLW0602 | 2 | 2 | 0 | 0 | 0 |
S106 | 2 | 2 | 0 | 0 | 0 |
PT011 | 2 | 2 | 0 | 0 | 0 |
N803 | 2 | 2 | 0 | 0 | 0 |
S301 | 2 | 2 | 0 | 0 | 0 |
I001 | 2 | 2 | 0 | 0 | 0 |
NPY002 | 2 | 2 | 0 | 0 | 0 |
E117 | 2 | 2 | 0 | 0 | 0 |
D208 | 2 | 2 | 0 | 0 | 0 |
PD002 | 2 | 2 | 0 | 0 | 0 |
E272 | 2 | 2 | 0 | 0 | 0 |
PTH113 | 2 | 2 | 0 | 0 | 0 |
DTZ007 | 1 | 1 | 0 | 0 | 0 |
PLW0120 | 1 | 1 | 0 | 0 | 0 |
B019 | 1 | 1 | 0 | 0 | 0 |
RET507 | 1 | 1 | 0 | 0 | 0 |
S110 | 1 | 1 | 0 | 0 | 0 |
C416 | 1 | 1 | 0 | 0 | 0 |
FIX004 | 1 | 1 | 0 | 0 | 0 |
FURB140 | 1 | 1 | 0 | 0 | 0 |
SIM201 | 1 | 1 | 0 | 0 | 0 |
FURB113 | 1 | 1 | 0 | 0 | 0 |
PTH109 | 1 | 1 | 0 | 0 | 0 |
SIM105 | 1 | 1 | 0 | 0 | 0 |
PT003 | 1 | 1 | 0 | 0 | 0 |
PT022 | 1 | 1 | 0 | 0 | 0 |
C419 | 1 | 1 | 0 | 0 | 0 |
B018 | 1 | 1 | 0 | 0 | 0 |
TCH003 | 1 | 1 | 0 | 0 | 0 |
DTZ002 | 1 | 1 | 0 | 0 | 0 |
PYI024 | 1 | 1 | 0 | 0 | 0 |
PT015 | 1 | 1 | 0 | 0 | 0 |
B011 | 1 | 1 | 0 | 0 | 0 |
INP001 | 1 | 1 | 0 | 0 | 0 |
G003 | 1 | 1 | 0 | 0 | 0 |
G002 | 1 | 1 | 0 | 0 | 0 |
G201 | 1 | 1 | 0 | 0 | 0 |
E271 | 1 | 1 | 0 | 0 | 0 |
D209 | 1 | 1 | 0 | 0 | 0 |
PYI030 | 1 | 1 | 0 | 0 | 0 |
D204 | 1 | 1 | 0 | 0 | 0 |
N812 | 1 | 1 | 0 | 0 | 0 |
D410 | 1 | 1 | 0 | 0 | 0 |
D411 | 1 | 1 | 0 | 0 | 0 |
PERF102 | 1 | 1 | 0 | 0 | 0 |
PLW1641 | 1 | 1 | 0 | 0 | 0 |
PTH108 | 1 | 1 | 0 | 0 | 0 |
PTH100 | 1 | 1 | 0 | 0 | 0 |
E266 | 1 | 1 | 0 | 0 | 0 |
PTH103 | 1 | 1 | 0 | 0 | 0 |
EM103 | 1 | 1 | 0 | 0 | 0 |
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I'm not opposed to removing it, but I didn't have the impression that we had to spend much time maintaining it. I guess the only real cost was compile time.
Any specific reason that motivated you to remove the rule now?
Ah yeah, it's not motivated by anything specific, I'd just prefer to keep unused code in source rather than on |
This reverts commit f9dd7bb.
This reverts commit f9dd7bb.
This reverts commit f9dd7bb.
This reverts commit f9dd7bb.
This reverts commit f9dd7bb.
This reverts commit f9dd7bb.
This reverts commit f9dd7bb.
## Summary This PR re-introduces the control-flow graph implementation which was first introduced in #5384, and then removed in #9463 due to not being feature complete. Mainly, it lacked the ability to process `try`-`except` blocks, along with some more minor bugs. Closes #8958 and #8959 and #14881. ## Overview of Changes I will now highlight the major changes implemented in this PR, in order of implementation. 1. Introduced a post-processing step in loop handling to find any `continue` or `break` statements within the loop body and redirect them appropriately. 2. Introduced a loop-continue block which is always placed at the end of loop blocks, and ensures proper looping regardless of the internal logic of the block. This resolves #8958. 3. Implemented `try` processing with the following logic (resolves #8959): 1. In the example below the cfg first encounters a conditional `ExceptionRaised` forking if an exception was (or will be) raised in the try block. This is not possible to know (except for trivial cases) so we assume both paths can be taken unconditionally. 2. Going down the `try` path the cfg goes `try`->`else`->`finally` unconditionally. 3. Going down the `except` path the cfg will meet several conditional `ExceptionCaught` which fork depending on the nature of the exception caught. Again there's no way to know which exceptions may be raised so both paths are assumed to be taken unconditionally. 4. If none of the exception blocks catch the exception then the cfg terminates by raising a new exception. 5. A post-processing step is also implemented to redirect any `raises` or `returns` within the blocks appropriately. ```python def func(): try: print("try") except Exception: print("Exception") except OtherException as e: print("OtherException") else: print("else") finally: print("finally") ``` ```mermaid flowchart TD start(("Start")) return(("End")) block0[["`*(empty)*`"]] block1["print(#quot;finally#quot;)\n"] block2["print(#quot;else#quot;)\n"] block3["print(#quot;try#quot;)\n"] block4[["Exception raised"]] block5["print(#quot;OtherException#quot;)\n"] block6["try: print(#quot;try#quot;) except Exception: print(#quot;Exception#quot;) except OtherException as e: print(#quot;OtherException#quot;) else: print(#quot;else#quot;) finally: print(#quot;finally#quot;)\n"] block7["print(#quot;Exception#quot;)\n"] block8["try: print(#quot;try#quot;) except Exception: print(#quot;Exception#quot;) except OtherException as e: print(#quot;OtherException#quot;) else: print(#quot;else#quot;) finally: print(#quot;finally#quot;)\n"] block9["try: print(#quot;try#quot;) except Exception: print(#quot;Exception#quot;) except OtherException as e: print(#quot;OtherException#quot;) else: print(#quot;else#quot;) finally: print(#quot;finally#quot;)\n"] start --> block9 block9 -- "Exception raised" --> block8 block9 -- "else" --> block3 block8 -- "Exception" --> block7 block8 -- "else" --> block6 block7 --> block1 block6 -- "OtherException" --> block5 block6 -- "else" --> block4 block5 --> block1 block4 --> return block3 --> block2 block2 --> block1 block1 --> block0 block0 --> return ``` 6. Implemented `with` processing with the following logic: 1. `with` statements have no conditional execution (apart from the hidden logic handling the enter and exit), so the block is assumed to execute unconditionally. 2. The one exception is that exceptions raised within the block may result in control flow resuming at the end of the block. Since it is not possible know if an exception will be raised, or if it will be handled by the context manager, we assume that execution always continues after `with` blocks even if the blocks contain `raise` or `return` statements. This is handled in a post-processing step. ## Test Plan Additional test fixtures and control-flow fixtures were added. --------- Co-authored-by: Micha Reiser <[email protected]> Co-authored-by: dylwil3 <[email protected]>
Summary
We haven't found time to flip this on, so feels like it's best to remove it for now -- can always restore from source when we get back to it.