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n64: fix PI DMA implementation to handle a newly discovered behavior #1385

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merged 1 commit into from
Feb 5, 2024

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@rasky rasky commented Feb 5, 2024

I've lately discovered that misaligned PI DMA is also affected by RDRAM writes that must cross RDRAM row boundaries (2048 bytes). It is obvious in retrospect that the DMA implementation cannot generate a write burst across different rows, so its internal buffering must be segmented on RDRAM row boundaries.

The PI DMA testsuite has been updated to cover this edge case as well: https://github.com/rasky/n64_pi_dma_test

Ares now passes the updated testsuite in full (timing aside, which is close but not perfect).

I've lately discovered that misaligned PI DMA is also affected by RDRAM
writes that must cross RDRAM row boundaries (2048 bytes). It is obvious
in retrospect that the DMA implementation cannot generate a write burst
across different rows, so its internal buffering must be segmented
on RDRAM row boundaries.

The PI DMA testsuite has been updated to cover this edge case as well:
https://github.com/rasky/n64_pi_dma_test

Ares now passes the updated testsuite in full (timing aside, which is
close but not perfect).
@LukeUsher LukeUsher merged commit 4c15ed7 into ares-emulator:master Feb 5, 2024
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