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success sending clk + ff info except optical power
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pkotamnives committed Jul 21, 2023
1 parent 55307b3 commit 18c177a
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Showing 2 changed files with 20 additions and 24 deletions.
2 changes: 1 addition & 1 deletion projects/cm_mcu/Tasks.h
Original file line number Diff line number Diff line change
Expand Up @@ -316,7 +316,7 @@ void EEPROMTask(void *parameters);
extern QueueHandle_t xZynqMonQueue;
void ZynqMonTask(void *parameters);
// data for zynqmon task to be sent to Zynq
#define ZM_NUM_ENTRIES 512
#define ZM_NUM_ENTRIES 256
struct zynqmon_data_t {
uint8_t sensor;
union convert_16_t {
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42 changes: 19 additions & 23 deletions projects/cm_mcu/ZynqMonTask.c
Original file line number Diff line number Diff line change
Expand Up @@ -328,19 +328,19 @@ void zm_set_firefly_ff12part(struct zynqmon_data_t data[], int start)
for (int rx12 = 0; rx12 < ffl12_f1_args.n_devices / 2; rx12++) {
data[rx12].sensor = rx12 + start; // sensor id
if (!isFFStale()) {
data[rx12].data.i = (ffl12_f1_args.ffpart_bit_mask >> rx12) & 0x01; // sensor value and type
data[rx12].data.i = (int8_t)((ffl12_f1_args.ffpart_bit_mask >> rx12) & 0x01); // sensor value and type
}
else {
data[rx12].data.i = -56; // special stale value
}
}
// FPGA2
for (int rx12 = ffl12_f1_args.n_devices / 2; rx12 < ffl12_f2_args.n_devices / 2 + ffl12_f1_args.n_devices / 2; rx12++) {
for (int rx12 = 0; rx12 < ffl12_f2_args.n_devices / 2; rx12++) {
if (!isFFStale()) {
data[rx12].data.i = (ffl12_f2_args.ffpart_bit_mask >> (rx12 - ffl12_f1_args.n_devices / 2)) & 0x01; // sensor value and type
data[rx12 + ffl12_f1_args.n_devices / 2].data.i = (int8_t)((ffl12_f2_args.ffpart_bit_mask >> rx12) & 0x01); // sensor value and type
}
else {
data[rx12].data.i = -56; // special stale value
data[rx12 + ffl12_f1_args.n_devices / 2].data.i = -56; // special stale value
}
}
}
Expand Down Expand Up @@ -547,29 +547,25 @@ void zm_fill_structs(void)
void zm_fill_structs(void)
{
// firefly, size 20
zm_set_firefly_temps(&zynqmon_data[0], 0);
zm_set_firefly_temps(&zynqmon_data[0], 1);
// uptime, size 2
zm_set_uptime(&zynqmon_data[20], 22);
zm_set_uptime(&zynqmon_data[20], 24);
// psmon, size 84
zm_set_psmon(&zynqmon_data[22], 32);
// gitversion, size 10
zm_set_gitversion(&zynqmon_data[106], 118);
zm_set_psmon(&zynqmon_data[22], 27);
// gitversion, size 10.0
zm_set_gitversion(&zynqmon_data[106], 112);
// adcmon, size 21
zm_set_adcmon(&zynqmon_data[116], 130);
zm_set_adcmon(&zynqmon_data[116], 123);
// fpga, size 8
zm_set_fpga(&zynqmon_data[137], 152);
// clocks, R0A, size 8
zm_set_clock(&zynqmon_data[145], 162, 0);
// clocks, R0B,R1A,R1B,R1C. size 32
zm_set_clock(&zynqmon_data[153], 189, 1);
// 12-ch firefly bit-mask part, size 6
zm_set_firefly_ff12part(&zynqmon_data[185], 232);
// present-bit, size 20
zm_set_firefly_presentbit(&zynqmon_data[191], 240);
// firefly optical power of 25Gbs 12-ch FFs, size 72
//zm_set_firefly_opt_pow(&zynqmon_data[205], 262, 0);
// firefly optical power of 25Gbs 4-ch FFs, size 32
//zm_set_firefly_opt_pow(&zynqmon_data[277], 336, 1);
zm_set_fpga(&zynqmon_data[137], 145);
// clk0mon, size 8
zm_set_clock(&zynqmon_data[145], 154, 0);
// clkmon, size 32
zm_set_clock(&zynqmon_data[153], 170, 1);
// firefly_ff12part, size 6
zm_set_firefly_ff12part(&zynqmon_data[185], 204);
// firefly_presentbit, size 20
zm_set_firefly_presentbit(&zynqmon_data[191], 212);

}
#define ZMON_VALID_ENTRIES 211
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