FIX: export eq circuit- model name (#5561)

ansys · Dec 12, 2024 · 7ff7050 · 7ff7050
1 parent 6853abf
commit 7ff7050
Show file tree

Hide file tree

Showing 3 changed files with 2 additions and 5 deletions.
diff --git a/src/ansys/aedt/core/q3d.py b/src/ansys/aedt/core/q3d.py
@@ -1083,9 +1083,6 @@ def export_equivalent_circuit(
 
         if model is None:
             model = self.project_name
-        elif model != self.project_name:
-            self.logger.error("Invalid project name.")
-            return False
 
         if decompose_variable_value(lumped_length)[1] not in [
             "cm",

diff --git a/tests/system/general/test_30_Q2D.py b/tests/system/general/test_30_Q2D.py
@@ -298,7 +298,7 @@ def test_15_export_equivalent_circuit(self, add_app):
         assert q2d.export_equivalent_circuit(
             output_file=os.path.join(self.local_scratch.path, "test_export_circuit.cir"), model=q2d_q3d
         )
-        assert not q2d.export_equivalent_circuit(
+        assert q2d.export_equivalent_circuit(
             output_file=os.path.join(self.local_scratch.path, "test_export_circuit.cir"), model="test"
         )
         self.aedtapp.close_project(q2d.project_name, save=False)

diff --git a/tests/system/solvers/test_31_Q3D.py b/tests/system/solvers/test_31_Q3D.py
@@ -497,7 +497,7 @@ def test_16_export_equivalent_circuit(self, add_app):
         assert q3d.export_equivalent_circuit(
             output_file=os.path.join(self.local_scratch.path, "test_export_circuit.cir"), model="test_14"
         )
-        assert not q3d.export_equivalent_circuit(
+        assert q3d.export_equivalent_circuit(
             output_file=os.path.join(self.local_scratch.path, "test_export_circuit.cir"), model="test"
         )
         self.aedtapp.close_project(q3d.project_name, save=False)