spi: axi-spi-engine: fix CPHA

In the ADI AXI SPI Engine IP, the CPHA bit in the SPI configuration
register is defined[1] as follows:

    Configures the phase of the SCLK signal. When 0, data is updated on
    the leading edge and sampled on the trailing edge. When 1, data is
    is sampled on the leading edge and updated on the trailing edge.

This is the opposite of the conventional definition of CPHA where CPHA=0
means that data is sampled on the leading edge and CPHA=1 means that
data is sampled on the trailing edge.

[1]: https://wiki.analog.com/resources/fpga/peripherals/spi_engine/instruction_format#spi_configuration_register

Signed-off-by: David Lechner <[email protected]>

drivers/spi/spi-axi-spi-engine.c

@@ -132,7 +132,8 @@ static unsigned int spi_engine_get_config(struct spi_device *spi)
 
 	if (spi->mode & SPI_CPOL)
 		config |= SPI_ENGINE_CONFIG_CPOL;
-	if (spi->mode & SPI_CPHA)
+	/* SPI Engine definition of CPHA is unconventional. */
+	if (!(spi->mode & SPI_CPHA))
 		config |= SPI_ENGINE_CONFIG_CPHA;
 	if (spi->mode & SPI_3WIRE)
 		config |= SPI_ENGINE_CONFIG_3WIRE;