Accellera SPIRIT/IP-XACT XML Schemas

This is a mirror of Accellera (SPIRIT) IP-XACT XSD schemas¹ with small fixes.

Bug fixes

Here are the list of things that are fixed and different from Accellera original release.

• Improper xs:import usage:
  • xsdata.exceptions.ParserError
  • Wrong xs:import in IPXACT/1685-2022-VE-1.0 XSD schema

References

• Accellera IP-XACT Technical Committee
  • Accellera SPIRIT IP-XACT Schemas
  • The SPIRIT Consortium - Reference BusDefs
  • IP-XACTTC
  • IEEE Std 1685-2009 - IEEE Standard for IP-XACT, Standard Structure for Packaging, Integrating, and Reusing IP within Tool Flows - 2010-02-18.pdf
• IPXACT-Ruby:
  • System Level Synthesis (SLS) project page
  • IPXACT-Ruby
  • IPXACT-Ruby Documentation
• Free Miscellaneous EDA Utilities
  • sourceforge project page
• Research team AOSTE IP-XACTTools
  • SCiPX: SystemC to IP-XACT converter
  • IPXACT2marte/Marte2IPXACT: IP-XACT to MARTE converter/MARTE to IP-XACT converter
• BYU (Brigham Young University) Configurable Computing Lab
  • CHREC (NSF Center for High Performance Reconfigurable Computing) Vendor Extensions
• OpenFPGA.org
• Instigate IP-XACT Front-end (C++)
• System Level Design with .NET Technology
• Denali
• Duolog
• Arteris
  • Formerly Magillem
• Productive-EDA

Footnotes

1. http://www.accellera.org/XMLSchema "Accellera SPIRIT IP-XACT Schemas" ↩