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cranelift: Delete all references to AllocationConsumer (bytecodeallia…
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…nce#8592)

Since there are no calls left to AllocationConsumer's methods, this
commit just deletes all the arguments of this type, as well as the
definition of the type itself.
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jameysharp authored May 10, 2024
1 parent bc081b7 commit e6f9ca5
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Showing 20 changed files with 906 additions and 1,035 deletions.
56 changes: 28 additions & 28 deletions cranelift/codegen/src/isa/aarch64/inst/args.rs
Original file line number Diff line number Diff line change
Expand Up @@ -300,19 +300,19 @@ impl BranchTarget {
}

impl PrettyPrint for ShiftOpAndAmt {
fn pretty_print(&self, _: u8, _: &mut AllocationConsumer) -> String {
fn pretty_print(&self, _: u8) -> String {
format!("{:?} {}", self.op(), self.amt().value())
}
}

impl PrettyPrint for ExtendOp {
fn pretty_print(&self, _: u8, _: &mut AllocationConsumer) -> String {
fn pretty_print(&self, _: u8) -> String {
format!("{:?}", self)
}
}

impl PrettyPrint for MemLabel {
fn pretty_print(&self, _: u8, _: &mut AllocationConsumer) -> String {
fn pretty_print(&self, _: u8) -> String {
match self {
MemLabel::PCRel(off) => format!("pc+{}", off),
MemLabel::Mach(off) => format!("label({})", off.get()),
Expand All @@ -332,35 +332,35 @@ fn shift_for_type(size_bytes: u8) -> usize {
}

impl PrettyPrint for AMode {
fn pretty_print(&self, size_bytes: u8, allocs: &mut AllocationConsumer) -> String {
fn pretty_print(&self, size_bytes: u8) -> String {
debug_assert!(size_bytes != 0);
match self {
&AMode::Unscaled { rn, simm9 } => {
let reg = pretty_print_reg(rn, allocs);
let reg = pretty_print_reg(rn);
if simm9.value != 0 {
let simm9 = simm9.pretty_print(8, allocs);
let simm9 = simm9.pretty_print(8);
format!("[{}, {}]", reg, simm9)
} else {
format!("[{}]", reg)
}
}
&AMode::UnsignedOffset { rn, uimm12 } => {
let reg = pretty_print_reg(rn, allocs);
let reg = pretty_print_reg(rn);
if uimm12.value() != 0 {
let uimm12 = uimm12.pretty_print(8, allocs);
let uimm12 = uimm12.pretty_print(8);
format!("[{}, {}]", reg, uimm12)
} else {
format!("[{}]", reg)
}
}
&AMode::RegReg { rn, rm } => {
let r1 = pretty_print_reg(rn, allocs);
let r2 = pretty_print_reg(rm, allocs);
let r1 = pretty_print_reg(rn);
let r2 = pretty_print_reg(rm);
format!("[{}, {}]", r1, r2)
}
&AMode::RegScaled { rn, rm } => {
let r1 = pretty_print_reg(rn, allocs);
let r2 = pretty_print_reg(rm, allocs);
let r1 = pretty_print_reg(rn);
let r2 = pretty_print_reg(rm);
let shift = shift_for_type(size_bytes);
format!("[{}, {}, LSL #{}]", r1, r2, shift)
}
Expand All @@ -370,28 +370,28 @@ impl PrettyPrint for AMode {
ExtendOp::SXTW | ExtendOp::UXTW => OperandSize::Size32,
_ => OperandSize::Size64,
};
let r1 = pretty_print_reg(rn, allocs);
let r2 = pretty_print_ireg(rm, size, allocs);
let op = extendop.pretty_print(0, allocs);
let r1 = pretty_print_reg(rn);
let r2 = pretty_print_ireg(rm, size);
let op = extendop.pretty_print(0);
format!("[{}, {}, {} #{}]", r1, r2, op, shift)
}
&AMode::RegExtended { rn, rm, extendop } => {
let size = match extendop {
ExtendOp::SXTW | ExtendOp::UXTW => OperandSize::Size32,
_ => OperandSize::Size64,
};
let r1 = pretty_print_reg(rn, allocs);
let r2 = pretty_print_ireg(rm, size, allocs);
let op = extendop.pretty_print(0, allocs);
let r1 = pretty_print_reg(rn);
let r2 = pretty_print_ireg(rm, size);
let op = extendop.pretty_print(0);
format!("[{}, {}, {}]", r1, r2, op)
}
&AMode::Label { ref label } => label.pretty_print(0, allocs),
&AMode::Label { ref label } => label.pretty_print(0),
&AMode::SPPreIndexed { simm9 } => {
let simm9 = simm9.pretty_print(8, allocs);
let simm9 = simm9.pretty_print(8);
format!("[sp, {}]!", simm9)
}
&AMode::SPPostIndexed { simm9 } => {
let simm9 = simm9.pretty_print(8, allocs);
let simm9 = simm9.pretty_print(8);
format!("[sp], {}", simm9)
}
AMode::Const { addr } => format!("[const({})]", addr.as_u32()),
Expand All @@ -409,39 +409,39 @@ impl PrettyPrint for AMode {
}

impl PrettyPrint for PairAMode {
fn pretty_print(&self, _: u8, allocs: &mut AllocationConsumer) -> String {
fn pretty_print(&self, _: u8) -> String {
match self {
&PairAMode::SignedOffset { reg, simm7 } => {
let reg = pretty_print_reg(reg, allocs);
let reg = pretty_print_reg(reg);
if simm7.value != 0 {
let simm7 = simm7.pretty_print(8, allocs);
let simm7 = simm7.pretty_print(8);
format!("[{}, {}]", reg, simm7)
} else {
format!("[{}]", reg)
}
}
&PairAMode::SPPreIndexed { simm7 } => {
let simm7 = simm7.pretty_print(8, allocs);
let simm7 = simm7.pretty_print(8);
format!("[sp, {}]!", simm7)
}
&PairAMode::SPPostIndexed { simm7 } => {
let simm7 = simm7.pretty_print(8, allocs);
let simm7 = simm7.pretty_print(8);
format!("[sp], {}", simm7)
}
}
}
}

impl PrettyPrint for Cond {
fn pretty_print(&self, _: u8, _: &mut AllocationConsumer) -> String {
fn pretty_print(&self, _: u8) -> String {
let mut s = format!("{:?}", self);
s.make_ascii_lowercase();
s
}
}

impl PrettyPrint for BranchTarget {
fn pretty_print(&self, _: u8, _: &mut AllocationConsumer) -> String {
fn pretty_print(&self, _: u8) -> String {
match self {
&BranchTarget::Label(label) => format!("label{:?}", label.get()),
&BranchTarget::ResolvedOffset(off) => format!("{}", off),
Expand Down
43 changes: 11 additions & 32 deletions cranelift/codegen/src/isa/aarch64/inst/emit.rs
Original file line number Diff line number Diff line change
Expand Up @@ -165,11 +165,7 @@ fn enc_cbr(op_31_24: u32, off_18_0: u32, op_4: u32, cond: u32) -> u32 {
(op_31_24 << 24) | (off_18_0 << 5) | (op_4 << 4) | cond
}

fn enc_conditional_br(
taken: BranchTarget,
kind: CondBrKind,
_allocs: &mut AllocationConsumer,
) -> u32 {
fn enc_conditional_br(taken: BranchTarget, kind: CondBrKind) -> u32 {
match kind {
CondBrKind::Zero(reg) => enc_cmpbr(0b1_011010_0, taken.as_offset19_or_zero(), reg),
CondBrKind::NotZero(reg) => enc_cmpbr(0b1_011010_1, taken.as_offset19_or_zero(), reg),
Expand Down Expand Up @@ -722,13 +718,11 @@ impl MachInstEmit for Inst {

fn emit(
&self,
allocs: &[Allocation],
_allocs: &[Allocation],
sink: &mut MachBuffer<Inst>,
emit_info: &Self::Info,
state: &mut EmitState,
) {
let mut allocs = AllocationConsumer::new(allocs);

// N.B.: we *must* not exceed the "worst-case size" used to compute
// where to insert islands, except when islands are explicitly triggered
// (with an `EmitIsland`). We check this in debug builds. This is `mut`
Expand Down Expand Up @@ -1626,7 +1620,6 @@ impl MachInstEmit for Inst {
sink.put4(enc_conditional_br(
BranchTarget::Label(again_label),
CondBrKind::NotZero(x24),
&mut AllocationConsumer::default(),
));
sink.use_label_at_offset(br_offset, again_label, LabelUse::Branch19);
}
Expand Down Expand Up @@ -1704,7 +1697,6 @@ impl MachInstEmit for Inst {
sink.put4(enc_conditional_br(
BranchTarget::Label(out_label),
CondBrKind::Cond(Cond::Ne),
&mut AllocationConsumer::default(),
));
sink.use_label_at_offset(br_out_offset, out_label, LabelUse::Branch19);

Expand All @@ -1721,7 +1713,6 @@ impl MachInstEmit for Inst {
sink.put4(enc_conditional_br(
BranchTarget::Label(again_label),
CondBrKind::NotZero(x24),
&mut AllocationConsumer::default(),
));
sink.use_label_at_offset(br_again_offset, again_label, LabelUse::Branch19);

Expand Down Expand Up @@ -2833,7 +2824,6 @@ impl MachInstEmit for Inst {
sink.put4(enc_conditional_br(
BranchTarget::Label(else_label),
CondBrKind::Cond(cond),
&mut AllocationConsumer::default(),
));
sink.use_label_at_offset(br_else_offset, else_label, LabelUse::Branch19);

Expand Down Expand Up @@ -2981,7 +2971,7 @@ impl MachInstEmit for Inst {
ref callee,
ref info,
} => {
emit_return_call_common_sequence(&mut allocs, sink, emit_info, state, info);
emit_return_call_common_sequence(sink, emit_info, state, info);

// Note: this is not `Inst::Jump { .. }.emit(..)` because we
// have different metadata in this case: we don't have a label
Expand All @@ -2996,7 +2986,7 @@ impl MachInstEmit for Inst {
start_off = sink.cur_offset();
}
&Inst::ReturnCallInd { callee, ref info } => {
emit_return_call_common_sequence(&mut allocs, sink, emit_info, state, info);
emit_return_call_common_sequence(sink, emit_info, state, info);

Inst::IndirectBr {
rn: callee,
Expand All @@ -3019,12 +3009,10 @@ impl MachInstEmit for Inst {
let cond_off = sink.cur_offset();
if let Some(l) = taken.as_label() {
sink.use_label_at_offset(cond_off, l, LabelUse::Branch19);
let mut allocs_inv = allocs.clone();
let inverted =
enc_conditional_br(taken, kind.invert(), &mut allocs_inv).to_le_bytes();
let inverted = enc_conditional_br(taken, kind.invert()).to_le_bytes();
sink.add_cond_branch(cond_off, cond_off + 4, l, &inverted[..]);
}
sink.put4(enc_conditional_br(taken, kind, &mut allocs));
sink.put4(enc_conditional_br(taken, kind));

// Unconditional part next.
let uncond_off = sink.cur_offset();
Expand Down Expand Up @@ -3063,11 +3051,7 @@ impl MachInstEmit for Inst {
let label = sink.defer_trap(trap_code, state.take_stack_map());
// condbr KIND, LABEL
let off = sink.cur_offset();
sink.put4(enc_conditional_br(
BranchTarget::Label(label),
kind,
&mut allocs,
));
sink.put4(enc_conditional_br(BranchTarget::Label(label), kind));
sink.use_label_at_offset(off, label, LabelUse::Branch19);
}
&Inst::IndirectBr { rn, .. } => {
Expand Down Expand Up @@ -3116,11 +3100,8 @@ impl MachInstEmit for Inst {
// the middle; we depend on hardcoded PC-rel addressing below.

// Branch to default when condition code from prior comparison indicates.
let br = enc_conditional_br(
BranchTarget::Label(default),
CondBrKind::Cond(Cond::Hs),
&mut AllocationConsumer::default(),
);
let br =
enc_conditional_br(BranchTarget::Label(default), CondBrKind::Cond(Cond::Hs));

// No need to inform the sink's branch folding logic about this branch, because it
// will not be merged with any other branch, flipped, or elided (it is not preceded
Expand Down Expand Up @@ -3568,14 +3549,12 @@ impl MachInstEmit for Inst {
state.clear_post_insn();
}

fn pretty_print_inst(&self, allocs: &[Allocation], state: &mut Self::State) -> String {
let mut allocs = AllocationConsumer::new(allocs);
self.print_with_state(state, &mut allocs)
fn pretty_print_inst(&self, _allocs: &[Allocation], state: &mut Self::State) -> String {
self.print_with_state(state)
}
}

fn emit_return_call_common_sequence(
_allocs: &mut AllocationConsumer,
sink: &mut MachBuffer<Inst>,
emit_info: &EmitInfo,
state: &mut EmitState,
Expand Down
3 changes: 1 addition & 2 deletions cranelift/codegen/src/isa/aarch64/inst/emit_tests.rs
Original file line number Diff line number Diff line change
Expand Up @@ -7863,8 +7863,7 @@ fn test_aarch64_binemit() {
);

// Check the printed text is as expected.
let actual_printing =
insn.print_with_state(&mut EmitState::default(), &mut AllocationConsumer::new(&[]));
let actual_printing = insn.print_with_state(&mut EmitState::default());
assert_eq!(expected_printing, actual_printing);

let mut buffer = MachBuffer::new();
Expand Down
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