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small update to documentation for l1d
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christindbose committed Oct 24, 2024
1 parent d075d47 commit fa235eb
Showing 1 changed file with 3 additions and 2 deletions.
5 changes: 3 additions & 2 deletions configs/tested-cfgs/SM90_H100/gpgpusim.config
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# base config were taken from v100 and modified
# Items modified
# Num SMs, mem channels (HBM3 datawidth per channel)
#
# L1D, L2 size
#
# functional simulator specification
-gpgpu_ptx_instruction_classification 0
-gpgpu_ptx_sim_mode 0
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# <sector?>:<nsets>:<bsize>:<assoc>,<rep>:<wr>:<alloc>:<wr_alloc>:<set_index_fn>,<mshr>:<N>:<merge>,<mq>:**<fifo_entry>
# ** Optional parameter - Required when mshr_type==Texture Fifo
# Defualt config is 160KB DL1 and 96KB shared memory
# In Volta, we assign the remaining shared memory to L1 cache
# In Hopper, we assign the remaining shared memory to L1 cache
# # if the assigned shd mem = 0, then L1 cache = 256KB
# For more info, see https://docs.nvidia.com/cuda/cuda-c-programming-guide/index.html#shared-memory-7-x
# disable this mode in case of multi kernels/apps execution
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