Update RISC-V instructions in mini-riscv.c and cpu-riscv64.mdesc

Xinlong-Wu · Jan 22, 2024 · f52b1cf · f52b1cf
1 parent 5d25673
commit f52b1cf
Show file tree

Hide file tree

Showing 2 changed files with 2 additions and 2 deletions.
diff --git a/src/mono/mono/mini/cpu-riscv64.mdesc b/src/mono/mono/mini/cpu-riscv64.mdesc
@@ -61,7 +61,7 @@ call_membase: dest:a src1:b len:20 clob:c
 voidcall: len:4 clob:c
 voidcall_reg: src1:i len:4 clob:c
 voidcall_membase: src1:b len:20 clob:c
-vcall2: len:16 clob:c
+vcall2: len:24 clob:c
 vcall2_reg: src1:i len:16 clob:c
 vcall2_membase: src1:b len:28 clob:c
 fcall: dest:f len:8 clob:c

diff --git a/src/mono/mono/mini/mini-riscv.c b/src/mono/mono/mini/mini-riscv.c
@@ -4597,7 +4597,7 @@ mono_arch_output_basic_block (MonoCompile *cfg, MonoBasicBlock *bb)
 			riscv_addi (code, RISCV_T0, RISCV_SP, 0);
 			loop_start = code;
 			riscv_beq (code, RISCV_T0, RISCV_T1, 0);
-			riscv_ld (code, RISCV_ZERO, RISCV_T0, 0);
+			riscv_sd (code, RISCV_ZERO, RISCV_T0, 0);
 			riscv_sd (code, RISCV_ZERO, RISCV_T0, sizeof (host_mgreg_t));
 #ifdef TARGET_RISCV32
 			NOT_IMPLEMENTED;