Further work to Esp32 arch. (#2151)

Build changes:

* Switch to CMake build (Ninja) and SDK v4.1 (latest stable release)
* SDK builds empty project with empty app_main() so it completes without error
* SDK paths are configured within makefile, do not run `export.sh` (simplifies usage, especially with eclipse)
* SDK builds in Win32
* Use sub-make to copy files after building SDK - portable
* Add ESP_VARIANT support (esp32, esp32s2)
* Use esptool Component (updated to latest v3.0 release) for both Esp8266 and Esp32

Structural changes:

* Move esp_idf and esp_hal into esp32 Component
* Enforce coding style

Fixes:

* malloc_count needs to wrap strdup
* Compile warnings (except tcpip_adapter deprecation warnings - STRICT required)
* Tweak memanalyzer.py going from memory map in soc/soc.h
* Implement task queue
* Implement `flashmem_get_address` using mmap registers
* Flash data segments. ESP32 has separate segments for instruction and data. Instruction segment must use aligned accesses, but this is not required for the data segment. Additional values added to the arch `esp_attr.h` file to support this.

.gitmodules

@@ -34,7 +34,7 @@
 #
 
 [submodule "esptool"]
-	path = Sming/Arch/Esp8266/Components/esptool/esptool
+	path = Sming/Components/esptool/esptool
 	url = https://github.com/espressif/esptool
 	ignore = dirty
 [submodule "esptool2"]

README.md

@@ -24,9 +24,9 @@ Table of Contents
 
 * [Summary](#summary)
 * [Compatibility](#compatibility)
-   * [Architecture: Esp32](#architecture-esp32-experimental)
    * [Architecture: ESP8266](#architecture-esp8266)
    * [Architecture: Host](#architecture-host)
+   * [Architecture: Esp32](#architecture-esp32-experimental)
 * [Releases](#releases)
    * [Stable](#stable)
    * [Development](#development)
@@ -104,7 +104,7 @@ Linux and Windows OSes with gcc compilers are supported. Clang is NOT supported.
 
 ### Architecture: ESP32 (Experimental)
 
-Supported SDK: ESP-IDF v4.0
+Supported SDK: ESP-IDF v4.1
 
 
 ## Releases

Sming/Arch/Esp32/Components/driver/component.mk

@@ -1,13 +1,8 @@
-COMPONENT_DEPENDS			:= esp32
+COMPONENT_DEPENDS := \
+	arch_driver \
+	esp32
 
 COMPONENT_SRCDIRS			:= .
 COMPONENT_INCDIRS			:= include
 
-COMPONENT_DOXYGEN_INPUT		        := include/driver
-
-# hw_timer
-COMPONENT_VARS				+= USE_US_TIMER
-USE_US_TIMER				?= 1
-ifeq ($(USE_US_TIMER),1)
-GLOBAL_CFLAGS				+= -DUSE_US_TIMER
-endif
+COMPONENT_DOXYGEN_INPUT		:= include/driver

Sming/Arch/Esp32/Components/driver/hw_timer.cpp

@@ -9,29 +9,12 @@
  ****/
 
 #include <driver/hw_timer.h>
-#include <esp_timer.h>
 
 static struct {
 	hw_timer_callback_t func = nullptr;
 	void* arg = nullptr;
 } nmi_callback;
 
-/**
- * @brief timer2_ms_flag
- *
- * FRC2 used as reference for NOW() - a macro which reads FRC2_COUNT register
- *
- * eagle_soc.h defines TIMER_CLK_FREQ using a divisor of 256, but this is only the SDK default setting and
- * is changed to 16 when `system_timer_reinit()` is called.
- *
- * The `timer2_ms_flag` indicates the current prescaler setting, however all related timing constants are
- * pre-calculated to avoid un-necessary runtime calculations.
- *
- * Note: This setting is reflected in the FRC2_CTRL register
- * 		 FRC2_CTRL_ADDRESS = 0x28 (omitted from eagle_soc.h).
- */
-static bool timer2_ms_flag;
-
 static void IRAM_ATTR nmi_handler()
 {
 	nmi_callback.func(nmi_callback.arg);
@@ -41,18 +24,18 @@ void hw_timer1_attach_interrupt(hw_timer_source_type_t source_type, hw_timer_cal
 {
 	if(source_type == TIMER_NMI_SOURCE) {
 		if(arg == NULL) {
-//			ETS_FRC_TIMER1_NMI_INTR_ATTACH(reinterpret_cast<void (*)()>(callback));
+			//			ETS_FRC_TIMER1_NMI_INTR_ATTACH(reinterpret_cast<void (*)()>(callback));
 		} else {
 			nmi_callback.func = callback;
 			nmi_callback.arg = arg;
-//			ETS_FRC_TIMER1_NMI_INTR_ATTACH(nmi_handler);
+			//			ETS_FRC_TIMER1_NMI_INTR_ATTACH(nmi_handler);
 		}
 	} else {
-//		ETS_FRC_TIMER1_INTR_ATTACH(callback, arg);
+		//		ETS_FRC_TIMER1_INTR_ATTACH(callback, arg);
 	}
 }
 
 void hw_timer_init(void)
 {
-	esp_timer_init();
+	ets_timer_init();
 }

Sming/Arch/Esp32/Components/driver/i2s.cpp

@@ -1,3 +1,5 @@
+#if 0
+
 /****
  * Sming Framework Project - Open Source framework for high efficiency native ESP8266 development.
  * Created 2015 by Skurydin Alexey
@@ -880,3 +882,5 @@ void i2s_set_pins(i2s_pin_set_t pins, bool enable)
 		PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTDI_U, enable ? FUNC_I2SI_DATA : FUNC_GPIO12);
 	}
 }
+
+#endif

Sming/Arch/Esp32/Components/driver/include/driver/gpio.h

@@ -12,14 +12,12 @@
 
 #pragma once
 
-#include <c_types.h>
+#include_next <driver/gpio.h>
 
 #ifdef __cplusplus
 extern "C" {
 #endif
 
-#include <driver/gpio.h>
-
 /**
  * @defgroup gpio_driver GPIO driver
  * @ingroup drivers

Sming/Arch/Esp32/Components/driver/include/driver/hw_timer.h

@@ -11,6 +11,7 @@
 #pragma once
 
 #include <esp_systemapi.h>
+#include <soc/frc_timer_reg.h>
 
 #define HW_TIMER_BASE_CLK APB_CLK_FREQ
 
@@ -84,17 +85,14 @@ void IRAM_ATTR hw_timer1_attach_interrupt(hw_timer_source_type_t source_type, hw
  */
 inline void IRAM_ATTR hw_timer1_enable(hw_timer_clkdiv_t div, hw_timer_intr_type_t intr_type, bool auto_load)
 {
-	constexpr uint32_t FRC1_ENABLE_TIMER = BIT7;
-	constexpr uint32_t FRC1_AUTO_LOAD = BIT6;
-
-	uint32_t ctrl = (div & 0x0C) | (intr_type & 0x01) | FRC1_ENABLE_TIMER;
+	uint32_t ctrl = (div & 0x0C) | (intr_type & 0x01) | FRC_TIMER_ENABLE;
 	if(auto_load) {
-		ctrl |= FRC1_AUTO_LOAD;
+		ctrl |= FRC_TIMER_AUTOLOAD;
 	}
 
-	WRITE_PERI_REG(FRC1_CTRL_ADDRESS, ctrl);
-//	TM1_EDGE_INT_ENABLE();
-//	ETS_FRC1_INTR_ENABLE();
+	REG_WRITE(FRC_TIMER_CTRL_REG(0), ctrl);
+	//	TM1_EDGE_INT_ENABLE();
+	//	ETS_FRC1_INTR_ENABLE();
 }
 
 /**
@@ -103,16 +101,16 @@ inline void IRAM_ATTR hw_timer1_enable(hw_timer_clkdiv_t div, hw_timer_intr_type
  */
 __forceinline void IRAM_ATTR hw_timer1_write(uint32_t ticks)
 {
-	WRITE_PERI_REG(FRC1_LOAD_ADDRESS, ticks);
+	REG_WRITE(FRC_TIMER_LOAD_REG(0), ticks);
 }
 
 /**
  * @brief Disable the timer
  */
 __forceinline void IRAM_ATTR hw_timer1_disable(void)
 {
-//	TM1_EDGE_INT_DISABLE();
-//	ETS_FRC1_INTR_DISABLE();
+	//	TM1_EDGE_INT_DISABLE();
+	//	ETS_FRC1_INTR_DISABLE();
 }
 
 /**
@@ -121,8 +119,8 @@ __forceinline void IRAM_ATTR hw_timer1_disable(void)
 __forceinline void IRAM_ATTR hw_timer1_detach_interrupt(void)
 {
 	hw_timer1_disable();
-//	ETS_FRC_TIMER1_NMI_INTR_ATTACH(NULL);
-//	ETS_FRC_TIMER1_INTR_ATTACH(NULL, NULL);
+	//	ETS_FRC_TIMER1_NMI_INTR_ATTACH(NULL);
+	//	ETS_FRC_TIMER1_INTR_ATTACH(NULL, NULL);
 }
 
 /**
@@ -131,7 +129,7 @@ __forceinline void IRAM_ATTR hw_timer1_detach_interrupt(void)
  */
 __forceinline uint32_t hw_timer1_read(void)
 {
-	return FRC_TIMER_COUNT_REG(0);
+	return REG_READ(FRC_TIMER_COUNT_REG(0));
 }
 
 /*************************************
@@ -140,14 +138,11 @@ __forceinline uint32_t hw_timer1_read(void)
  *
  * This is a 32-bit count-up timer
  *
+ * See idf components/esp32/esp_timer_esp32.c
+ *
  *************************************/
 
-#ifdef USE_US_TIMER
-constexpr uint32_t HW_TIMER2_CLKDIV = TIMER_CLKDIV_16;
-#else
-constexpr uint32_t HW_TIMER2_CLKDIV = TIMER_CLKDIV_256;
-#endif
-
+constexpr uint32_t HW_TIMER2_CLKDIV = TIMER_CLKDIV_1;
 constexpr uint32_t HW_TIMER2_CLK = HW_TIMER_BASE_CLK >> HW_TIMER2_CLKDIV;
 
 /**
@@ -156,18 +151,10 @@ constexpr uint32_t HW_TIMER2_CLK = HW_TIMER_BASE_CLK >> HW_TIMER2_CLKDIV;
  */
 __forceinline uint32_t hw_timer2_read(void)
 {
-	return FRC_TIMER_COUNT_REG(1);
+	return REG_READ(FRC_TIMER_COUNT_REG(1));
 }
 
-/**
- * @brief Set timer2 alarm count value
- * @param ticks
- * @note For internal use ONLY; used by software timers
- */
-__forceinline void hw_timer2_set_alarm(uint32_t ticks)
-{
-	WRITE_PERI_REG(FRC_TIMER_ALARM_REG(1), ticks);
-}
+#define NOW() hw_timer2_read()
 
 /**
  * @brief Initialise hardware timers