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[CP] Upstream LLVM commit upgrades and gfx950 target addition
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jataylo committed Dec 13, 2024
1 parent dbc771e commit 2de5803
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Showing 6 changed files with 11 additions and 9 deletions.
2 changes: 1 addition & 1 deletion cmake/llvm-hash.txt
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@@ -1 +1 @@
b5cc222d7429fe6f18c787f633d5262fac2e676f
86b69c31642e98f8357df62c09d118ad1da4e16a
11 changes: 5 additions & 6 deletions lib/Conversion/TritonToTritonGPU/TritonGPUConversion.cpp
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Expand Up @@ -56,20 +56,19 @@ TritonGPUTypeConverter::TritonGPUTypeConverter(MLIRContext *context,
// This will create newArg, and map(origArg, newArg)
addArgumentMaterialization([&](OpBuilder &builder,
RankedTensorType tensorType, ValueRange inputs,
Location loc) -> std::optional<Value> {
Location loc) -> Value {
llvm_unreachable("Argument rematerialization should not happen in Triton "
"-> TritonGPU conversion");
return std::nullopt;
return {};
});

// If the origValue still has live user(s), use this to
// convert origValue to newValue
addSourceMaterialization([&](OpBuilder &builder, RankedTensorType tensorType,
ValueRange inputs,
Location loc) -> std::optional<Value> {
ValueRange inputs, Location loc) -> Value {
llvm_unreachable("Source rematerialization should not happen in Triton -> "
"TritonGPU Conversion");
return std::nullopt;
return {};
});

// This will be called when (desiredType != newOperandType)
Expand All @@ -79,7 +78,7 @@ TritonGPUTypeConverter::TritonGPUTypeConverter(MLIRContext *context,
ValueRange inputs, Location loc) {
auto cast =
builder.create<triton::gpu::ConvertLayoutOp>(loc, tensorType, inputs);
return std::optional<Value>(cast.getResult());
return cast.getResult();
});
}

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2 changes: 1 addition & 1 deletion test/TritonGPU/amd/amd-convert-buffer-ops.mlir
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Expand Up @@ -42,7 +42,7 @@ module attributes {"triton_gpu.num-ctas" = 1 : i32, "triton_gpu.num-warps" = 4 :
%1 = arith.muli %0, %c1024_i32 : i32
%sub = arith.subi %1, %c128_i32 : i32
%cmp = arith.cmpi sgt, %sub, %c0_i32 : i32
"llvm.intr.assume"(%cmp) : (i1) -> ()
llvm.intr.assume %cmp : i1
%2 = tt.splat %sub : i32 -> tensor<1024xi32, #blocked>
%3 = tt.make_range {end = 1024 : i32, start = 0 : i32} : tensor<1024xi32, #blocked>
// CHECK: %[[offset:.*]] = arith.addi
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2 changes: 1 addition & 1 deletion test/lib/Instrumentation/GPUHello.cpp
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Expand Up @@ -61,7 +61,7 @@ bool GpuHello::runOnModule(Module &module) {

PassPluginLibraryInfo getPassPluginInfo() {
const auto callback = [](PassBuilder &pb) {
pb.registerOptimizerLastEPCallback([&](ModulePassManager &mpm, auto) {
pb.registerOptimizerLastEPCallback([&](ModulePassManager &mpm, auto, auto) {
mpm.addPass(GpuHello());
return true;
});
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2 changes: 2 additions & 0 deletions third_party/amd/backend/include/hsa/amd_hsa_elf.h
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Expand Up @@ -130,6 +130,8 @@ enum : unsigned {
EF_AMDGPU_MACH_AMDGCN_GFX1151 = 0x04a,
EF_AMDGPU_MACH_AMDGCN_GFX941 = 0x04b,
EF_AMDGPU_MACH_AMDGCN_GFX942 = 0x04c,
EF_AMDGPU_MACH_AMDGCN_GFX950 = 0x04f,
// clang-format on

// First/last AMDGCN-based processors.
EF_AMDGPU_MACH_AMDGCN_FIRST = EF_AMDGPU_MACH_AMDGCN_GFX600,
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1 change: 1 addition & 0 deletions third_party/amd/lib/TritonAMDGPUToLLVM/TargetUtils.cpp
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Expand Up @@ -11,6 +11,7 @@ ISAFamily deduceISAFamily(llvm::StringRef arch) {

// CDNA ISA cases
switch (kind) {
case llvm::AMDGPU::GK_GFX950:
case llvm::AMDGPU::GK_GFX942:
case llvm::AMDGPU::GK_GFX941:
case llvm::AMDGPU::GK_GFX940:
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