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Cleanup timeline drawer with schedule analysis pass. #7935
Cleanup timeline drawer with schedule analysis pass. #7935
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releasenotes/notes/cleanup-timeline-drawer-a6287bdab4459e6e.yaml
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LGTM, just one small inline comment. Also I think maybe having a test that we raise an Attribute error on an unscheduled circuit would be good just so we have the coverage.
Co-authored-by: Matthew Treinish <[email protected]>
Pull Request Test Coverage Report for Build 2510201605
💛 - Coveralls |
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Overall this LGTM, just one question about the release note
qc, backend, initial_layout=[0, 1], coupling_map=[[0, 1]], scheduling_method="alap" | ||
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scheduled_insts = list(zip(qct.op_start_times, qct.data)) | ||
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Did you want to add a deprecation note about visualizing a timeline for an unscheduled/untranspiled circuit?
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Thanks Matthew I've forgotten to write. Added in 8891220
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LGTM, thanks for the update
Summary
Timeline drawer implements own scheduler but this is no longer necessary since we have implemented absolute-time scheduling pass in #7709.
This PR copies this scheduling outcome to the output circuit and let the timeline drawer use this information. Because this schedule contains t0 for classical registers, now timeline drawer can properly show time slots for classical registers.
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