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Add .index() and new() method to Qubit and Clbit #13284

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merged 5 commits into from
Oct 9, 2024
Merged

Add .index() and new() method to Qubit and Clbit #13284

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4d1ffa7
Add .index() and new() method to Qubit and Clbit
mtreinish Oct 5, 2024
5c84176
Merge remote-tracking branch 'origin/main' into qubit.index
mtreinish Oct 7, 2024
04f6233
Use Qubit::new() and Clbit::new() where applicable
mtreinish Oct 7, 2024
5a2a55f
Merge remote-tracking branch 'origin/main' into qubit.index
mtreinish Oct 8, 2024
1e6d4af
Panic on overflow with new() constructor
mtreinish Oct 8, 2024
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7 changes: 2 additions & 5 deletions crates/accelerate/src/check_map.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -30,10 +30,7 @@ fn recurse<'py>(
let check_qubits = |qubits: &[Qubit]| -> bool {
match wire_map {
Some(wire_map) => {
let mapped_bits = [
wire_map[qubits[0].0 as usize],
wire_map[qubits[1].0 as usize],
];
let mapped_bits = [wire_map[qubits[0].index()], wire_map[qubits[1].index()]];
edge_set.contains(&[mapped_bits[0].into(), mapped_bits[1].into()])
}
None => edge_set.contains(&[qubits[0].into(), qubits[1].into()]),
Expand All @@ -58,7 +55,7 @@ fn recurse<'py>(
.map(|inner| {
let outer = qubits[inner];
match wire_map {
Some(wire_map) => wire_map[outer.0 as usize],
Some(wire_map) => wire_map[outer.index()],
None => outer,
}
})
Expand Down
4 changes: 2 additions & 2 deletions crates/accelerate/src/commutation_checker.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -377,7 +377,7 @@ impl CommutationChecker {
first_qargs
.iter()
.enumerate()
.map(|(i, q)| (q, Qubit(i as u32))),
.map(|(i, q)| (q, Qubit::new(i))),
);
let mut num_qubits = first_qargs.len() as u32;
for q in second_qargs {
Expand Down Expand Up @@ -574,7 +574,7 @@ fn get_relative_placement(
) -> SmallVec<[Option<Qubit>; 2]> {
let mut qubits_g2: HashMap<&Qubit, Qubit> = HashMap::with_capacity(second_qargs.len());
second_qargs.iter().enumerate().for_each(|(i_g1, q_g1)| {
qubits_g2.insert_unique_unchecked(q_g1, Qubit(i_g1 as u32));
qubits_g2.insert_unique_unchecked(q_g1, Qubit::new(i_g1));
});

first_qargs
Expand Down
12 changes: 5 additions & 7 deletions crates/accelerate/src/elide_permutations.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -43,8 +43,8 @@ fn run(py: Python, dag: &mut DAGCircuit) -> PyResult<Option<(DAGCircuit, Vec<usi
match (inst.op.name(), inst.condition()) {
("swap", None) => {
let qargs = dag.get_qargs(inst.qubits);
let index0 = qargs[0].0 as usize;
let index1 = qargs[1].0 as usize;
let index0 = qargs[0].index();
let index1 = qargs[1].index();
mapping.swap(index0, index1);
}
("permutation", None) => {
Expand All @@ -55,7 +55,7 @@ fn run(py: Python, dag: &mut DAGCircuit) -> PyResult<Option<(DAGCircuit, Vec<usi
let qindices: Vec<usize> = dag
.get_qargs(inst.qubits)
.iter()
.map(|q| q.0 as usize)
.map(|q| q.index())
.collect();

let remapped_qindices: Vec<usize> = (0..qindices.len())
Expand All @@ -79,9 +79,7 @@ fn run(py: Python, dag: &mut DAGCircuit) -> PyResult<Option<(DAGCircuit, Vec<usi
let cargs = dag.get_cargs(inst.clbits);
let mapped_qargs: Vec<Qubit> = qargs
.iter()
.map(|q| q.0 as usize)
.map(|q| mapping[q])
.map(|q| Qubit(q.try_into().unwrap()))
.map(|q| Qubit::new(mapping[q.index()]))
.collect();

new_dag.apply_operation_back(
Expand All @@ -92,7 +90,7 @@ fn run(py: Python, dag: &mut DAGCircuit) -> PyResult<Option<(DAGCircuit, Vec<usi
inst.params.as_deref().cloned(),
inst.extra_attrs.clone(),
#[cfg(feature = "cache_pygates")]
None,
inst.py_op.get().map(|x| x.clone_ref(py)),
)?;
}
}
Expand Down
12 changes: 6 additions & 6 deletions crates/accelerate/src/euler_one_qubit_decomposer.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -1103,7 +1103,7 @@ pub(crate) fn optimize_1q_gates_decomposition(
continue;
}
}
if basis_gates_per_qubit[qubit.0 as usize].is_none() {
if basis_gates_per_qubit[qubit.index()].is_none() {
let basis_gates = match target {
Some(target) => Some(
target
Expand All @@ -1115,11 +1115,11 @@ pub(crate) fn optimize_1q_gates_decomposition(
basis.map(|basis| basis.iter().map(|x| x.as_str()).collect())
}
};
basis_gates_per_qubit[qubit.0 as usize] = basis_gates;
basis_gates_per_qubit[qubit.index()] = basis_gates;
}
let basis_gates = &basis_gates_per_qubit[qubit.0 as usize].as_ref();
let basis_gates = &basis_gates_per_qubit[qubit.index()].as_ref();

let target_basis_set = &mut target_basis_per_qubit[qubit.0 as usize];
let target_basis_set = &mut target_basis_per_qubit[qubit.index()];
if !target_basis_set.initialized() {
match target {
Some(_target) => EULER_BASES
Expand Down Expand Up @@ -1168,7 +1168,7 @@ pub(crate) fn optimize_1q_gates_decomposition(
target_basis_set.remove(EulerBasis::ZSX);
}
}
let target_basis_set = &target_basis_per_qubit[qubit.0 as usize];
let target_basis_set = &target_basis_per_qubit[qubit.index()];
let operator = raw_run
.iter()
.map(|node_index| {
Expand Down Expand Up @@ -1201,7 +1201,7 @@ pub(crate) fn optimize_1q_gates_decomposition(
let sequence = unitary_to_gate_sequence_inner(
aview2(&operator),
target_basis_set,
qubit.0 as usize,
qubit.index(),
None,
true,
None,
Expand Down
6 changes: 3 additions & 3 deletions crates/accelerate/src/gate_direction.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -106,7 +106,7 @@ where
let block_ok = if let Some(mapping) = qubit_mapping {
let mapping = inst_qargs // Create a temp mapping for the recursive call
.iter()
.map(|q| mapping[q.0 as usize])
.map(|q| mapping[q.index()])
.collect::<Vec<Qubit>>();

check_gate_direction(py, &inner_dag, gate_complies, Some(&mapping))?
Expand All @@ -128,8 +128,8 @@ where
Some(mapping) => gate_complies(
packed_inst,
&[
mapping[inst_qargs[0].0 as usize],
mapping[inst_qargs[1].0 as usize],
mapping[inst_qargs[0].index()],
mapping[inst_qargs[1].index()],
],
),
None => gate_complies(packed_inst, inst_qargs),
Expand Down
12 changes: 4 additions & 8 deletions crates/accelerate/src/gates_in_basis.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -42,7 +42,7 @@ fn any_gate_missing_from_target(dag: &DAGCircuit, target: &Target) -> PyResult<b

if gate.op.control_flow() {
for block in gate.op.blocks() {
let block_qubits = (0..block.num_qubits()).map(|i| Qubit(i.try_into().unwrap()));
let block_qubits = (0..block.num_qubits()).map(Qubit::new);
let inner_wire_map = qargs
.iter()
.zip(block_qubits)
Expand Down Expand Up @@ -74,13 +74,9 @@ fn any_gate_missing_from_target(dag: &DAGCircuit, target: &Target) -> PyResult<b
}

// In the outer DAG, virtual and physical bits are the same thing.
let wire_map: HashMap<Qubit, PhysicalQubit> =
HashMap::from_iter((0..dag.num_qubits()).map(|i| {
(
Qubit(i.try_into().unwrap()),
PhysicalQubit::new(i.try_into().unwrap()),
)
}));
let wire_map: HashMap<Qubit, PhysicalQubit> = HashMap::from_iter(
(0..dag.num_qubits()).map(|i| (Qubit::new(i), PhysicalQubit::new(i.try_into().unwrap()))),
);

// Process the DAG.
for gate in dag.op_nodes(true) {
Expand Down
36 changes: 18 additions & 18 deletions crates/accelerate/src/synthesis/clifford/bm_synthesis.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -173,52 +173,52 @@ fn reduce_cost(
gates.push((
StandardGate::SGate,
smallvec![],
smallvec![Qubit(qubit0 as u32)],
smallvec![Qubit::new(qubit0)],
));
gates.push((
StandardGate::HGate,
smallvec![],
smallvec![Qubit(qubit0 as u32)],
smallvec![Qubit::new(qubit0)],
));
} else if n0 == 2 {
gates.push((
StandardGate::HGate,
smallvec![],
smallvec![Qubit(qubit0 as u32)],
smallvec![Qubit::new(qubit0)],
));
gates.push((
StandardGate::SdgGate,
smallvec![],
smallvec![Qubit(qubit0 as u32)],
smallvec![Qubit::new(qubit0)],
));
}
if n1 == 1 {
gates.push((
StandardGate::SGate,
smallvec![],
smallvec![Qubit(qubit1 as u32)],
smallvec![Qubit::new(qubit1)],
));
gates.push((
StandardGate::HGate,
smallvec![],
smallvec![Qubit(qubit1 as u32)],
smallvec![Qubit::new(qubit1)],
));
} else if n1 == 2 {
gates.push((
StandardGate::HGate,
smallvec![],
smallvec![Qubit(qubit1 as u32)],
smallvec![Qubit::new(qubit1)],
));
gates.push((
StandardGate::SdgGate,
smallvec![],
smallvec![Qubit(qubit1 as u32)],
smallvec![Qubit::new(qubit1)],
));
}
gates.push((
StandardGate::CXGate,
smallvec![],
smallvec![Qubit(qubit0 as u32), Qubit(qubit1 as u32)],
smallvec![Qubit::new(qubit0), Qubit::new(qubit1)],
));

return Ok((reduced_cliff, new_cost));
Expand All @@ -242,19 +242,19 @@ fn decompose_clifford_1q(cliff: &Clifford, gates: &mut CliffordGatesVec, output_
gates.push((
StandardGate::ZGate,
smallvec![],
smallvec![Qubit(output_qubit as u32)],
smallvec![Qubit::new(output_qubit)],
));
} else if !destab_phase && stab_phase {
gates.push((
StandardGate::XGate,
smallvec![],
smallvec![Qubit(output_qubit as u32)],
smallvec![Qubit::new(output_qubit)],
));
} else if destab_phase && stab_phase {
gates.push((
StandardGate::YGate,
smallvec![],
smallvec![Qubit(output_qubit as u32)],
smallvec![Qubit::new(output_qubit)],
));
}

Expand All @@ -268,39 +268,39 @@ fn decompose_clifford_1q(cliff: &Clifford, gates: &mut CliffordGatesVec, output_
gates.push((
StandardGate::SGate,
smallvec![],
smallvec![Qubit(output_qubit as u32)],
smallvec![Qubit::new(output_qubit)],
));
}
} else if !stab_z && stab_x {
if destab_x {
gates.push((
StandardGate::SdgGate,
smallvec![],
smallvec![Qubit(output_qubit as u32)],
smallvec![Qubit::new(output_qubit)],
));
}
gates.push((
StandardGate::HGate,
smallvec![],
smallvec![Qubit(output_qubit as u32)],
smallvec![Qubit::new(output_qubit)],
));
} else {
if !destab_z {
gates.push((
StandardGate::SGate,
smallvec![],
smallvec![Qubit(output_qubit as u32)],
smallvec![Qubit::new(output_qubit)],
));
}
gates.push((
StandardGate::HGate,
smallvec![],
smallvec![Qubit(output_qubit as u32)],
smallvec![Qubit::new(output_qubit)],
));
gates.push((
StandardGate::SGate,
smallvec![],
smallvec![Qubit(output_qubit as u32)],
smallvec![Qubit::new(output_qubit)],
));
}
}
Expand Down
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