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Fix flakiness in pulse-optimal UnitarySynthesis
test
#11307
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The previous iteration of this test asserted that the `sx` count for non-optimal synthesis was higher than a certain particular value. This value did not have any fundamental properties, it was just the value that happened to be returned for some time. Recent OpenBLAS support for x86_64 instructions from the AVX512 SkylakeX set meant that supporting processors can now return slightly fewer `sx` gates in the non-optimal path, despite the pulse-optimal synthesis still not being in use. This caused flaky CI, when we were allocated an Azure VM that had access to the new instructions.
jakelishman
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Nov 23, 2023
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LGTM, this is a more sensible approach to assert that our non-optimal synthesis pass is less optimal than the optimal path. The magic 16 sx gates does seem fragile in retrospect looking at this change now.
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The previous iteration of this test asserted that the `sx` count for non-optimal synthesis was higher than a certain particular value. This value did not have any fundamental properties, it was just the value that happened to be returned for some time. Recent OpenBLAS support for x86_64 instructions from the AVX512 SkylakeX set meant that supporting processors can now return slightly fewer `sx` gates in the non-optimal path, despite the pulse-optimal synthesis still not being in use. This caused flaky CI, when we were allocated an Azure VM that had access to the new instructions. (cherry picked from commit c7ecb5f)
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The previous iteration of this test asserted that the `sx` count for non-optimal synthesis was higher than a certain particular value. This value did not have any fundamental properties, it was just the value that happened to be returned for some time. Recent OpenBLAS support for x86_64 instructions from the AVX512 SkylakeX set meant that supporting processors can now return slightly fewer `sx` gates in the non-optimal path, despite the pulse-optimal synthesis still not being in use. This caused flaky CI, when we were allocated an Azure VM that had access to the new instructions. (cherry picked from commit c7ecb5f) Co-authored-by: Jake Lishman <[email protected]>
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The previous iteration of this test asserted that the `sx` count for non-optimal synthesis was higher than a certain particular value. This value did not have any fundamental properties, it was just the value that happened to be returned for some time. Recent OpenBLAS support for x86_64 instructions from the AVX512 SkylakeX set meant that supporting processors can now return slightly fewer `sx` gates in the non-optimal path, despite the pulse-optimal synthesis still not being in use. This caused flaky CI, when we were allocated an Azure VM that had access to the new instructions.
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Changelog: None
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stable backport potential
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type: qa
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Summary
The previous iteration of this test asserted that the
sx
count for non-optimal synthesis was higher than a certain particular value. This value did not have any fundamental properties, it was just the value that happened to be returned for some time. Recent OpenBLAS support for x86_64 instructions from the AVX512 SkylakeX set meant that supporting processors can now return slightly fewersx
gates in the non-optimal path, despite the pulse-optimal synthesis still not being in use. This caused flaky CI, when we were allocated an Azure VM that had access to the new instructions.Details and comments
Fix #11287.
Unblocks #11262 and lets us reinstate #11020.