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Jig mux alternate implementation #184
Jig mux alternate implementation #184
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- Run black - Bump mypy version - Drop 3.7 and add 3.12 to CI test runs - Fix some 3.7 specific imports.
I deleted a few comment and moved the content to #187 |
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Just a couple of questions here and there.
Still not sure about this...
O.K. this is no longer draft... I'm still not 100% on the address handler stuff. But my concerns are really how that ties with #182, so I think I need to get this merged and then see where that PR ends up. If we end up reworking the address handlers in that PR that is O.K. I've also created a handful of smaller issues. Once this PR is reviewed and merged we can decide if we want to do any of that work before making a new release. |
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I'm happy with where things are on this.
This silences a warning that were importing an private module from fixate.core in the top level __init__.py. So partly this is just to silence PyCharm, but it is a resonable change in general.
This introduces a new implementation of the jig switching support code. The primary motivation/goals:
This implementation make the "pin" concept the primary point of coupling between the AddressHandlers and VirtualMuxs. Then the JigDriver is being revised to improve type hinting of the jig driver object and also decouple instantiation at runtime from JigDriver subclass definition. In addition, I'm working towards the new code have complete (or near complete) type annotations.
While these changes are trying to avoid the need to change existing test scripts, it won't be possible to implement this in a completely backwards compatible way. So this will be introduced as a parallel implementation. Existing scripts will continue to run. New and updated scripts will import from a different submodule and be able to take advantage of the improved implementation. In time, the current jig_mapping implementation will be removed.
Once this work is done, it will be possible to move software with the related DriverManager change https://github.com/PyFixate/Fixate/pull/182/files
switch_through_all_signals
. Instead, create a method that returns all signals on a mux.iterate_all_mux_paths
to return mux object and signal pairs inline with the change above toswitch_through_all_signals
As a minimum, add a method to address map that ensures all pins from all virtual muxes have pin defined in an address handler. Probably call this during the JigDriver init.
VirtualAddressMap.{update_pin_by_name,update_pins_by_name, __getitem__, __setitem__}
""
? In the previous jig_mapping implementation, the behaviour of the empty signal was hard coded. If you defined some pins against""
, I'm pretty sure that would be ignored. Should we check that the user script doesn't redefine""
?MuxGroup.force_trigger
or similar, that writes all the current mux states out to hardware, even if the pins haven't changed?MuxGroup.trigger()
orVirtualAddressMap.trigger()
that processes any pin changes inVirtualAddressMap._pending_updates
(Issues created Add aforce_trigger
method to the jig driver #189 and Add aJigDriver.trigger()
method #190)open()
method to address handlers that Jig Driver will call when it needs to. Make AddressHandlers accept a pin_list in init()RelayMatrixVirtualMux
calledBreakBeforeMakeMux
. (Issue created Rename (or alias)RelayMatrixVirtualMux
asBreakBeforeMakeMux
#191)MakeBeforeBreakMux
subclass ofVirtualMux
(Issue created Rename (or alias)RelayMatrixVirtualMux
asBreakBeforeMakeMux
#191)