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Moving slowFPGA build to separate repo #53

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Sep 14, 2021
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2 changes: 0 additions & 2 deletions CONFIG.example
Original file line number Diff line number Diff line change
Expand Up @@ -12,8 +12,6 @@

# Definitions needed for FPGA build
export VIVADO = /dls_sw/FPGA/Xilinx/Vivado/$(VIVADO_VER)/settings64.sh
export ISE = /dls_sw/FPGA/Xilinx/14.7/ISE_DS/settings64.sh
export LM_LICENSE_FILE = [email protected]
Comment on lines -15 to -16
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Why have these been removed? The LM_LICENSE_FILE is definitely still needed...

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Xilinx ISE is no longer required by this repo.

LM_LICENCE_FILE - I am not so bothered about this. It is actually no longer needed for the regular PandA builds using recent versions of Vivado, as webpack devices no longer require a licence file. If targeting non-webpack devices or using licenced IP, the licence server can be set in the personal CONFIG file (I have this set in my bash profile). As CI builds in the cloud do not need to know about our local licence server, I would prefer to have no mention of licencing in the public repos at all.

Here is suggestion though, if you prefer:

# Specify path to licence server, if required
# export LM_LICENCE_FILE =

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I think it probably is worth adding just the empty LM_LICENCE_FILE then for those applications which will need a licence.


# Location of rootfs builder. This needs to be at least version 1.13 and can be
# downloaded from https://github.com/araneidae/rootfs
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4 changes: 2 additions & 2 deletions Makefile
Original file line number Diff line number Diff line change
Expand Up @@ -220,7 +220,7 @@ hdl_timing: $(TIMING_BUILD_DIRS)
# FPGA build

# The following phony targets are passed straight to the FPGA sub-make programme
FPGA_TARGETS = fpga-all fpga-bits carrier_fpga slow_fpga carrier_ip ps_core \
FPGA_TARGETS = fpga-all fpga-bit carrier_fpga carrier_ip ps_core \
fsbl devicetree boot u-boot dts xsct sw_clean u-boot-src ip_clean ps_clean

$(FPGA_TARGETS): $(TOP)/common/fpga.make $(AUTOGEN_BUILD_DIR) | update_VER
Expand Down Expand Up @@ -278,7 +278,7 @@ ZPKG_LIST = targets/$(TARGET)/etc/panda-fpga.list
ZPKG_VERSION = $(APP_NAME)-$(GIT_VERSION)
ZPKG_FILE = $(BUILD_DIR)/panda-fpga@$(ZPKG_VERSION).zpg

ZPKG_DEPENDS += fpga-bits
ZPKG_DEPENDS += fpga-bit
ZPKG_DEPENDS += $(APP_BUILD_DIR)/ipmi.ini
ZPKG_DEPENDS += $(APP_BUILD_DIR)/extensions
ZPKG_DEPENDS += $(DOCS_HTML_DIR)
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10 changes: 4 additions & 6 deletions common/fpga.make
Original file line number Diff line number Diff line change
Expand Up @@ -69,9 +69,7 @@ U_BOOT_BUILD = $(BOOT_BUILD)/u-boot
U_BOOT_ELF = $(U_BOOT_BUILD)/u-boot.elf

IMAGE_DIR=$(TGT_BUILD_DIR)/boot

BITS_PREREQ += carrier_fpga


# ------------------------------------------------------------------------------
# Helper code lifted from rootfs and other miscellaneous functions

Expand All @@ -81,15 +79,15 @@ EXTRACT_FILE = $(ROOTFS_TOP)/scripts/extract-tar $(SRC_ROOT) $1 $2 $(TAR_FILES)

#####################################################################
# BUILD TARGETS includes HW and SW
fpga-all: fpga-bits boot
fpga-bits: $(BITS_PREREQ)
fpga-all: fpga-bit boot
fpga-bit: carrier_fpga
carrier_ip: $(IP_DIR)/IP_BUILD_SUCCESS
ps_core: $(PS_CORE)
devicetree : $(DEVTREE_DTB)
fsbl : $(FSBL)
boot : $(IMAGE_DIR)/boot.bin $(DEVTREE_DTB)
u-boot: $(U_BOOT_ELF)
.PHONY: fpga-all fpga-bits carrier_ip ps_core boot devicetree fsbl u-boot
.PHONY: fpga-all fpga-bit carrier_ip ps_core boot devicetree fsbl u-boot

#####################################################################
# Compiler variables needed for u-boot build and other complitation
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26 changes: 26 additions & 0 deletions modules/system/hdl/system_registers.vhd
Original file line number Diff line number Diff line change
Expand Up @@ -39,6 +39,32 @@ end system_registers;

architecture rtl of system_registers is

-- Input Encoder Address List
constant INPROT_ADDR_LIST : page_array(ENC_NUM-1 downto 0) := (
TO_SVECTOR(INENC4_PROTOCOL, PAGE_AW),
TO_SVECTOR(INENC3_PROTOCOL, PAGE_AW),
TO_SVECTOR(INENC2_PROTOCOL, PAGE_AW),
TO_SVECTOR(INENC1_PROTOCOL, PAGE_AW)
);

-- Output Encoder Address List
constant OUTPROT_ADDR_LIST : page_array(ENC_NUM-1 downto 0) := (
TO_SVECTOR(OUTENC4_PROTOCOL, PAGE_AW),
TO_SVECTOR(OUTENC3_PROTOCOL, PAGE_AW),
TO_SVECTOR(OUTENC2_PROTOCOL, PAGE_AW),
TO_SVECTOR(OUTENC1_PROTOCOL, PAGE_AW)
);

-- TTLIN TERM Address List
constant TTLTERM_ADDR_LIST : page_array(TTLIN_NUM-1 downto 0) := (
TO_SVECTOR(TTLIN6_TERM, PAGE_AW),
TO_SVECTOR(TTLIN5_TERM, PAGE_AW),
TO_SVECTOR(TTLIN4_TERM, PAGE_AW),
TO_SVECTOR(TTLIN3_TERM, PAGE_AW),
TO_SVECTOR(TTLIN2_TERM, PAGE_AW),
TO_SVECTOR(TTLIN1_TERM, PAGE_AW)
);

Comment on lines +42 to +67
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What has this got to do with moving the slowFPGA build out?

Oh, I see. Tricky ... this list of definitions is also needed by the slow FPGA, as it's very architecture specific and is managed by the slow FPGA. Hmmm.

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See below

begin

---------------------------------------------------------------------------
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56 changes: 0 additions & 56 deletions targets/PandABox/SlowFPGA/SlowFPGA.make

This file was deleted.

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