[BACKPORT] Merged in kekiefer/nuttx/stm32f7-serial-fix-tiocssinglewir…

…e-upstream (pull request #658)

stm32f7: serial: Fix ioctl TIOCSSINGLEWIRE

The TRM notes that UE must be disabled in order to write HDSEL in
USART_CR3. This was not being done, so calls to TIOCSSINGLEWIRE were
silently failing.

This change checks the state of UE in USART_CR1, clears the UE bit
before writing HDSEL, then re-enables it if neccesary.

Approved-by: GregoryN <[email protected]>
(cherry picked from commit ba1f8e5)

arch/arm/src/stm32f7/stm32_serial.c

@@ -1924,6 +1924,22 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
 #ifdef CONFIG_STM32F7_USART_SINGLEWIRE
     case TIOCSSINGLEWIRE:
       {
+        uint32_t cr1;
+        uint32_t cr1_ue;
+        irqstate_t flags;
+
+        flags = enter_critical_section();
+
+        /* Get the original state of UE */
+
+        cr1  = up_serialin(priv, STM32_USART_CR1_OFFSET);
+        cr1_ue = cr1 & USART_CR1_UE;
+        cr1 &= ~USART_CR1_UE;
+
+        /* Disable UE, HDSEL can only be written when UE=0 */
+
+        up_serialout(priv, STM32_USART_CR1_OFFSET, cr1);
+
         /* Change the TX port to be open-drain/push-pull and enable/disable
          * half-duplex mode.
          */
@@ -1942,6 +1958,11 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
           }
 
         up_serialout(priv, STM32_USART_CR3_OFFSET, cr);
+
+        /* Re-enable UE if appropriate */
+
+        up_serialout(priv, STM32_USART_CR1_OFFSET, cr1 | cr1_ue);
+        leave_critical_section(flags);
       }
      break;
 #endif