[K32W0, K32W1] Add SIT ICD configurations

Add platform configurations required to use the ICD Manager Implementation (introduced by upstream PR project-chip#27283). Signed-off-by: Doru Gucea <[email protected]>
NXP · Aug 4, 2023 · 94aacf9 · 94aacf9
1 parent 777b9f8
commit 94aacf9
Show file tree

Hide file tree

Showing 6 changed files with 83 additions and 47 deletions.
diff --git a/src/platform/nxp/k32w/k32w0/CHIPDevicePlatformConfig.h b/src/platform/nxp/k32w/k32w0/CHIPDevicePlatformConfig.h
@@ -178,17 +178,13 @@
 
 #if CHIP_DEVICE_CONFIG_ENABLE_SED
 
-#ifndef CHIP_DEVICE_CONFIG_SED_IDLE_INTERVAL
-#define CHIP_DEVICE_CONFIG_SED_IDLE_INTERVAL chip::System::Clock::Milliseconds32(NXP_OT_IDLE_INTERVAL)
-#endif // CHIP_DEVICE_CONFIG_SED_IDLE_INTERVAL
+#ifndef CHIP_DEVICE_CONFIG_ICD_SLOW_POLL_INTERVAL
+#define CHIP_DEVICE_CONFIG_ICD_SLOW_POLL_INTERVAL chip::System::Clock::Milliseconds32(NXP_OT_IDLE_INTERVAL)
+#endif // CHIP_DEVICE_CONFIG_ICD_SLOW_POLL_INTERVAL
 
-#ifndef CHIP_DEVICE_CONFIG_SED_ACTIVE_INTERVAL
-#define CHIP_DEVICE_CONFIG_SED_ACTIVE_INTERVAL chip::System::Clock::Milliseconds32(NXP_OT_ACTIVE_INTERVAL)
-#endif // CHIP_DEVICE_CONFIG_SED_ACTIVE_INTERVAL
-
-#ifndef CHIP_DEVICE_CONFIG_SED_ACTIVE_THRESHOLD
-#define CHIP_DEVICE_CONFIG_SED_ACTIVE_THRESHOLD chip::System::Clock::Milliseconds32(NXP_ACTIVE_MODE_THRESHOLD)
-#endif // CHIP_DEVICE_CONFIG_SED_ACTIVE_THRESHOLD
+#ifndef CHIP_DEVICE_CONFIG_ICD_FAST_POLL_INTERVAL
+#define CHIP_DEVICE_CONFIG_ICD_FAST_POLL_INTERVAL chip::System::Clock::Milliseconds32(NXP_OT_ACTIVE_INTERVAL)
+#endif // CHIP_DEVICE_CONFIG_ICD_FAST_POLL_INTERVAL
 
 #endif
 

diff --git a/src/platform/nxp/k32w/k32w0/CHIPPlatformConfig.h b/src/platform/nxp/k32w/k32w0/CHIPPlatformConfig.h
@@ -77,4 +77,24 @@
 #define WDM_PUBLISHER_MAX_NOTIFIES_IN_FLIGHT 2
 #endif // WDM_PUBLISHER_MAX_NOTIFIES_IN_FLIGHT
 
+#if NXP_ICD_ENABLED
+
+#ifndef CHIP_CONFIG_ICD_IDLE_MODE_INTERVAL
+#define CHIP_CONFIG_ICD_IDLE_MODE_INTERVAL NXP_IDLE_MODE_INTERVAL
+#endif // CHIP_CONFIG_ICD_IDLE_MODE_INTERVAL
+
+#ifndef CHIP_CONFIG_ICD_ACTIVE_MODE_INTERVAL
+#define CHIP_CONFIG_ICD_ACTIVE_MODE_INTERVAL NXP_ACTIVE_MODE_INTERVAL
+#endif // CHIP_CONFIG_ICD_ACTIVE_MODE_INTERVAL
+
+#ifndef CHIP_CONFIG_ICD_ACTIVE_MODE_THRESHOLD
+#define CHIP_CONFIG_ICD_ACTIVE_MODE_THRESHOLD NXP_ACTIVE_MODE_THRESHOLD
+#endif // CHIP_CONFIG_ICD_ACTIVE_MODE_THRESHOLD
+
+#ifndef CHIP_CONFIG_ICD_CLIENTS_SUPPORTED_PER_FABRIC
+#define CHIP_CONFIG_ICD_CLIENTS_SUPPORTED_PER_FABRIC NXP_ICD_SUPPORTED_CLIENTS_PER_FABRIC
+#endif // CHIP_CONFIG_ICD_CLIENTS_SUPPORTED_PER_FABRIC
+
+#endif
+
 #include "platform/nxp/common/CHIPNXPPlatformDefaultConfig.h"
diff --git a/src/platform/nxp/k32w/k32w1/CHIPDevicePlatformConfig.h b/src/platform/nxp/k32w/k32w1/CHIPDevicePlatformConfig.h
@@ -116,17 +116,13 @@
 
 #if CHIP_DEVICE_CONFIG_ENABLE_SED
 
-#ifndef CHIP_DEVICE_CONFIG_SED_IDLE_INTERVAL
-#define CHIP_DEVICE_CONFIG_SED_IDLE_INTERVAL chip::System::Clock::Milliseconds32(NXP_OT_IDLE_INTERVAL)
-#endif // CHIP_DEVICE_CONFIG_SED_IDLE_INTERVAL
+#ifndef CHIP_DEVICE_CONFIG_ICD_SLOW_POLL_INTERVAL
+#define CHIP_DEVICE_CONFIG_ICD_SLOW_POLL_INTERVAL chip::System::Clock::Milliseconds32(NXP_OT_IDLE_INTERVAL)
+#endif // CHIP_DEVICE_CONFIG_ICD_SLOW_POLL_INTERVAL
 
-#ifndef CHIP_DEVICE_CONFIG_SED_ACTIVE_INTERVAL
-#define CHIP_DEVICE_CONFIG_SED_ACTIVE_INTERVAL chip::System::Clock::Milliseconds32(NXP_OT_ACTIVE_INTERVAL)
-#endif // CHIP_DEVICE_CONFIG_SED_ACTIVE_INTERVAL
-
-#ifndef CHIP_DEVICE_CONFIG_SED_ACTIVE_THRESHOLD
-#define CHIP_DEVICE_CONFIG_SED_ACTIVE_THRESHOLD chip::System::Clock::Milliseconds32(NXP_ACTIVE_MODE_THRESHOLD)
-#endif // CHIP_DEVICE_CONFIG_SED_ACTIVE_THRESHOLD
+#ifndef CHIP_DEVICE_CONFIG_ICD_FAST_POLL_INTERVAL
+#define CHIP_DEVICE_CONFIG_ICD_FAST_POLL_INTERVAL chip::System::Clock::Milliseconds32(NXP_OT_ACTIVE_INTERVAL)
+#endif // CHIP_DEVICE_CONFIG_ICD_FAST_POLL_INTERVAL
 
 #endif
 

diff --git a/src/platform/nxp/k32w/k32w1/CHIPPlatformConfig.h b/src/platform/nxp/k32w/k32w1/CHIPPlatformConfig.h
@@ -76,3 +76,23 @@
 #ifndef WDM_PUBLISHER_MAX_NOTIFIES_IN_FLIGHT
 #define WDM_PUBLISHER_MAX_NOTIFIES_IN_FLIGHT 2
 #endif // WDM_PUBLISHER_MAX_NOTIFIES_IN_FLIGHT
+
+#if NXP_ICD_ENABLED
+
+#ifndef CHIP_CONFIG_ICD_IDLE_MODE_INTERVAL
+#define CHIP_CONFIG_ICD_IDLE_MODE_INTERVAL NXP_IDLE_MODE_INTERVAL
+#endif // CHIP_CONFIG_ICD_IDLE_MODE_INTERVAL
+
+#ifndef CHIP_CONFIG_ICD_ACTIVE_MODE_INTERVAL
+#define CHIP_CONFIG_ICD_ACTIVE_MODE_INTERVAL NXP_ACTIVE_MODE_INTERVAL
+#endif // CHIP_CONFIG_ICD_ACTIVE_MODE_INTERVAL
+
+#ifndef CHIP_CONFIG_ICD_ACTIVE_MODE_THRESHOLD
+#define CHIP_CONFIG_ICD_ACTIVE_MODE_THRESHOLD NXP_ACTIVE_MODE_THRESHOLD
+#endif // CHIP_CONFIG_ICD_ACTIVE_MODE_THRESHOLD
+
+#ifndef CHIP_CONFIG_ICD_CLIENTS_SUPPORTED_PER_FABRIC
+#define CHIP_CONFIG_ICD_CLIENTS_SUPPORTED_PER_FABRIC NXP_ICD_SUPPORTED_CLIENTS_PER_FABRIC
+#endif // CHIP_CONFIG_ICD_CLIENTS_SUPPORTED_PER_FABRIC
+
+#endif
diff --git a/third_party/nxp/k32w0_sdk/k32w0_sdk.gni b/third_party/nxp/k32w0_sdk/k32w0_sdk.gni
@@ -47,11 +47,15 @@ declare_args() {
   chip_enable_ota_factory_data_processor = 0
   chip_with_pdm_encryption = 1
   ota_custom_entry_address = "0x000C1000"
-  # icd configuration flags
-  chip_enable_icd_subscription_handle = 0
-  chip_ot_idle_interval_ms = 1000  # 1s Idle Intervals
-  chip_ot_active_interval_ms = 100  # 100ms Active Intervals
-  chip_active_mode_threshold = 500  # 500ms Active mode threshold
+
+  #ICD Matter Configuration flags
+  chip_ot_idle_interval_ms = 2000   # 2s Idle Intervals
+  chip_ot_active_interval_ms = 500  # 500ms Active Intervals
+
+  nxp_idle_mode_interval_ms = 600000        # 10min Idle Mode Interval
+  nxp_active_mode_interval_ms = 10000       # 10s Active Mode Interval
+  nxp_active_mode_threshold_ms = 1000       # 1s Active Mode Threshold
+  nxp_icd_supported_clients_per_fabric = 2  # 2 registration slots per fabric
 }
 
 assert(k32w0_sdk_root != "", "k32w0_sdk_root must be specified")
@@ -338,10 +342,16 @@ template("k32w0_sdk") {
       "gSecLibUseSha256Alt_d=1",
       "gOTA_UseSecLibAes=1",
       "gResetSystemReset_d=1",
+
       #MATTER-1308: move these platform specific defines to args.gni
       "NXP_OT_IDLE_INTERVAL=${chip_ot_idle_interval_ms}",
       "NXP_OT_ACTIVE_INTERVAL=${chip_ot_active_interval_ms}",
-      "NXP_ACTIVE_MODE_THRESHOLD=${chip_active_mode_threshold}",
+
+       "NXP_ICD_ENABLED=1",
+       "NXP_ACTIVE_MODE_THRESHOLD=${nxp_active_mode_threshold_ms}",
+       "NXP_ACTIVE_MODE_INTERVAL=${nxp_active_mode_interval_ms}",
+       "NXP_IDLE_MODE_INTERVAL=${nxp_idle_mode_interval_ms}",
+       "NXP_ICD_SUPPORTED_CLIENTS_PER_FABRIC=${nxp_icd_supported_clients_per_fabric}",
     ]
 
     # If OTA default processors are enabled, then OTA custom entry structure
@@ -433,12 +443,6 @@ template("k32w0_sdk") {
       defines += [ "CHIP_DEVICE_CONFIG_THREAD_ENABLE_CLI=1" ]
     }
 
-    if (chip_enable_icd_subscription_handle == 1) {
-      defines += [
-        "CHIP_ICD_SUBSCRIPTION_HANDLING",
-      ]
-    }
-
     if (chip_with_low_power == 1) {
       defines += [
         "chip_with_low_power=1",

diff --git a/third_party/nxp/k32w1_sdk/k32w1_sdk.gni b/third_party/nxp/k32w1_sdk/k32w1_sdk.gni
@@ -28,11 +28,14 @@ declare_args() {
   k32w1_sdk_root = getenv("NXP_K32W1_SDK_ROOT")
   use_smu2_as_system_memory = false
 
-  # icd configuration flags
-  chip_enable_icd_subscription_handle = false
-  chip_ot_idle_interval_ms = 1000  # 1s Idle Intervals
-  chip_ot_active_interval_ms = 100  # 100ms Active Intervals
-  chip_active_mode_threshold = 500  # 500ms Active mode threshold
+  # ICD Matter Configuration flags
+  chip_ot_idle_interval_ms = 2000   # 2s Idle Intervals
+  chip_ot_active_interval_ms = 500  # 500ms Active Intervals
+
+  nxp_idle_mode_interval_ms = 600000        # 10min Idle Mode Interval
+  nxp_active_mode_interval_ms = 10000       # 10s Active Mode Interval
+  nxp_active_mode_threshold_ms = 1000       # 1s Active Mode Threshold
+  nxp_icd_supported_clients_per_fabric = 2  # 2 registration slots per fabric
 }
 
 openthread_nxp_root = "${chip_root}/third_party/openthread/ot-nxp"
@@ -42,9 +45,6 @@ assert(k32w1_sdk_root != "", "k32w1_sdk_root must be specified")
 assert(!(use_smu2_as_system_memory && !chip_openthread_ftd),
     "SMU2 can be used as system memory only with OT-FTD suppport")
 
-assert(!(chip_enable_icd_subscription_handle && chip_openthread_ftd),
-    "Please use chip_openthread_ftd=false when chip_enable_icd_subscription_handle is needed")
-
 # Defines an k32w1 SDK build target.
 #
 # Parameters:
@@ -256,10 +256,16 @@ template("k32w1_sdk") {
       "BLE_HIGH_TX_POWER=0",            # when enabled overwrite default tx power with following values gAdvertisingPowerLeveldBm_c and gConnectPowerLeveldBm_c
       "gAdvertisingPowerLeveldBm_c=0",
       "gConnectPowerLeveldBm_c=0",
+
       #MATTER-1308: move these platform specific defines to args.gni
       "NXP_OT_IDLE_INTERVAL=${chip_ot_idle_interval_ms}",
       "NXP_OT_ACTIVE_INTERVAL=${chip_ot_active_interval_ms}",
-      "NXP_ACTIVE_MODE_THRESHOLD=${chip_active_mode_threshold}",
+
+      "NXP_ICD_ENABLED=1",
+      "NXP_ACTIVE_MODE_THRESHOLD=${nxp_active_mode_threshold_ms}",
+      "NXP_ACTIVE_MODE_INTERVAL=${nxp_active_mode_interval_ms}",
+      "NXP_IDLE_MODE_INTERVAL=${nxp_idle_mode_interval_ms}",
+      "NXP_ICD_SUPPORTED_CLIENTS_PER_FABRIC=${nxp_icd_supported_clients_per_fabric}",
     ]
 
     if (chip_with_low_power == 1 && chip_logging == true) {
@@ -287,12 +293,6 @@ template("k32w1_sdk") {
       ]
     }
 
-    if (chip_enable_icd_subscription_handle) {
-      defines += [
-        "CHIP_ICD_SUBSCRIPTION_HANDLING",
-      ]
-    }
-
     if (chip_with_low_power == 1) {
       defines += [
         "chip_with_low_power=1",