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Fix ptx usage to account for PTX ISA availability #1359

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merged 9 commits into from
Feb 21, 2024
Merged

Fix ptx usage to account for PTX ISA availability #1359

merged 9 commits into from
Feb 21, 2024

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miscco
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@miscco miscco commented Feb 9, 2024 •
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We encountered CI failures when trying to update rmm.

It turns out that it is indeed valid to use an older CTK to build on a new Hopper machine.

That means we cannot solely guard ptx on the available architectures, but also need to account for the avilability of PTX ISA.

To ensure that this information is globally available, we move the ptx_isa detection into __cccl_config and use the appropriate feature test macros in the code

@miscco miscco requested review from a team as code owners February 9, 2024 11:11
@miscco miscco added libcu++ For all items related to libcu++ backport branch/2.3.x For backporting to the 2.3.x release branch bug: functional labels Feb 9, 2024
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Looks good. Just one nit.

Overall comment/question on testability:

  • Does our use of __CUDA_MINIMUM_ARCH__ disable the features when compiled for multiple architectures (say SM80+SM90)?
  • Should we test this in CI with all major architectures? Or would our use of __CUDA_MINIMUM_ARCH__ defeat the purpose?

libcudacxx/include/cuda/std/detail/libcxx/include/__cccl/ptx_isa.h Show resolved Hide resolved
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Wait.. We wouldn't be able to catch this anyway. I don't see 11.8 in the CI matrix?

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miscco commented Feb 9, 2024

Wait.. We wouldn't be able to catch this anyway. I don't see 11.8 in the CI matrix?

We would not, we need to expand out test matrix for that

@miscco miscco requested a review from a team as a code owner February 9, 2024 13:02
@miscco miscco force-pushed the fix_ptx_isa_availability branch from c75420d to 4744c02 Compare February 9, 2024 13:04
jrhemstad
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@miscco miscco force-pushed the fix_ptx_isa_availability branch from 4744c02 to ea8a188 Compare February 9, 2024 16:35
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@miscco miscco force-pushed the fix_ptx_isa_availability branch 5 times, most recently from 181060f to 1be7dee Compare February 12, 2024 10:23
miscco
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@miscco miscco force-pushed the fix_ptx_isa_availability branch 4 times, most recently from 52af97b to 704364b Compare February 14, 2024 20:29
@miscco
Move __cccl_ptx_isa into __cccl_config
33590ac 
We want this to be globally available
@miscco miscco force-pushed the fix_ptx_isa_availability branch 7 times, most recently from 63a957e to 47f524a Compare February 16, 2024 13:49
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miscco commented Feb 16, 2024

I have decided to punt on the CI enhancements, as those are really icky to get right-

Also we most likely wont backport those, so just reducing this to a pure product PR seems fine

ahendriksen
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libcudacxx/include/cuda/barrier
@@ -50,7 +50,7 @@ _LIBCUDACXX_BEGIN_NAMESPACE_CUDA_DEVICE_EXPERIMENTAL
// capability 9.0 and above. The check for (!defined(__CUDA_MINIMUM_ARCH__)) is
// necessary to prevent cudafe from ripping out the device functions before
// device compilation begins.
#if (!defined(__CUDA_MINIMUM_ARCH__)) || (defined(__CUDA_MINIMUM_ARCH__) && 900 <= __CUDA_MINIMUM_ARCH__)
#ifdef __cccl_lib_experimental_ctk12_cp_async_exposure
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The function below are not strictly speaking part of the experimental exposure, but the check for the feature is currently the same as the check for availability of cp.async.bulk would be. Not a blocker imho, just want to note this.

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Looks good. It makes sense to disable the mbarrier.expect_tx and cp.async.bulk tests on nvcc 11, as they aren't supported there.

I think the architecture conditional code is now properly guarded by both PTX ISA version and NV_IF_TARGET + linker error hack.

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I noticed on of the tests was failing. Suggested a fix.

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Code looks good now.

@ahendriksen ahendriksen mentioned this pull request Feb 20, 2024
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Can we merge this PR?

@miscco miscco merged commit f6903bf into NVIDIA:main Feb 21, 2024
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@miscco miscco deleted the fix_ptx_isa_availability branch February 21, 2024 08:50
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Backport failed for branch/2.3.x, because it was unable to cherry-pick the commit(s).

Please cherry-pick the changes locally.

git fetch origin branch/2.3.x
git worktree add -d .worktree/backport-1359-to-branch/2.3.x origin/branch/2.3.x
cd .worktree/backport-1359-to-branch/2.3.x
git checkout -b backport-1359-to-branch/2.3.x
ancref=$(git merge-base c8dde0ec2e42573069b1add37dfb83c5fc7a1673 555ac64435e6f0d175a09c34c4bdad9fa0ead91d)
git cherry-pick -x $ancref..555ac64435e6f0d175a09c34c4bdad9fa0ead91d

miscco added a commit to miscco/cccl that referenced this pull request Feb 21, 2024
@miscco
Fix ptx usage to account for PTX ISA availability (NVIDIA#1359)
0d94fc7 
Currently we only guard those instructions based on the available architecture. However, it is also valid to compile with an old toolkit for a new machine.

Consequently we need to strengthen our checks against available PTX ISA
miscco added a commit to miscco/cccl that referenced this pull request Feb 21, 2024
@miscco
Fix ptx usage to account for PTX ISA availability (NVIDIA#1359)
e11885c 
Currently we only guard those instructions based on the available architecture. However, it is also valid to compile with an old toolkit for a new machine.

Consequently we need to strengthen our checks against available PTX ISA
jrhemstad pushed a commit that referenced this pull request Feb 26, 2024
@miscco
[BACKPORT]: Fix ptx usage to account for PTX ISA availability (#1359) (…
df93a01 
…#1421)

* Fix ptx usage to account for PTX ISA availability (#1359)

Currently we only guard those instructions based on the available architecture. However, it is also valid to compile with an old toolkit for a new machine.

Consequently we need to strengthen our checks against available PTX ISA

* Do not use VLAs in `cp_async_bulk_tensor_*` tests

VLAs are a compiler extension and are correctly errored out by some compilers. As we always know the exact size of the array anyway just swtich to a `cuda::std::array`

Fixes nvbug4476664

* Use proper shared memory size

Authored-by: Allard Hendriksen <[email protected]>

* Fix incorrect linker issue

* Ensure runfail tests do not fail without execution

* Ensure that __cccl_ptx_isa properly guards feature flags
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@ahendriksen ahendriksen ahendriksen approved these changes

@gevtushenko gevtushenko gevtushenko approved these changes

@wmaxey wmaxey Awaiting requested review from wmaxey wmaxey is a code owner automatically assigned from NVIDIA/cccl-libcudacxx-codeowners

@ericniebler ericniebler Awaiting requested review from ericniebler ericniebler was automatically assigned from NVIDIA/cccl-codeowners

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