deps: V8: cherry-pick d1d4c648e7ff

Original commit message:

    Disable cross-compilation of clobber-registers.cc

    This file uses inline assembly, but inline assembly does not work
    for cross-compilation. As this file only contains debug code, no-oping
    this file for cross-compilation seems acceptable.

    [email protected]

    Bug: v8:12926
    Change-Id: I01276cf019e8c31e4db6f7f61a3d91526f660578
    Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/3735165
    Commit-Queue: Andreas Haas <[email protected]>
    Reviewed-by: Igor Sheludko <[email protected]>
    Cr-Commit-Position: refs/heads/main@{#81466}

Refs: v8/v8@d1d4c64
PR-URL: nodejs#46098
Reviewed-By: Jiawen Geng <[email protected]>
Reviewed-By: Yagiz Nizipli <[email protected]>
Reviewed-By: Ben Noordhuis <[email protected]>
Reviewed-By: Richard Lau <[email protected]>

common.gypi

@@ -36,7 +36,7 @@
 
     # Reset this number to 0 on major V8 upgrades.
     # Increment by one for each non-official patch applied to deps/v8.
-    'v8_embedder_string': '-node.20',
+    'v8_embedder_string': '-node.21',
 
     ##### V8 defaults for Node.js #####
 

deps/v8/src/execution/clobber-registers.cc

@@ -5,19 +5,22 @@
 
 #include "src/base/build_config.h"
 
-#if V8_HOST_ARCH_ARM
+// Check both {HOST_ARCH} and {TARGET_ARCH} to disable the functionality of this
+// file for cross-compilation. The reason is that the inline assembly code below
+// does not work for cross-compilation.
+#if V8_HOST_ARCH_ARM && V8_TARGET_ARCH_ARM
 #include "src/codegen/arm/register-arm.h"
-#elif V8_HOST_ARCH_ARM64
+#elif V8_HOST_ARCH_ARM64 && V8_TARGET_ARCH_ARM64
 #include "src/codegen/arm64/register-arm64.h"
-#elif V8_HOST_ARCH_IA32
+#elif V8_HOST_ARCH_IA32 && V8_TARGET_ARCH_IA32
 #include "src/codegen/ia32/register-ia32.h"
-#elif V8_HOST_ARCH_X64
+#elif V8_HOST_ARCH_X64 && V8_TARGET_ARCH_X64
 #include "src/codegen/x64/register-x64.h"
-#elif V8_HOST_ARCH_LOONG64
+#elif V8_HOST_ARCH_LOONG64 && V8_TARGET_ARCH_LOONG64
 #include "src/codegen/loong64/register-loong64.h"
-#elif V8_HOST_ARCH_MIPS
+#elif V8_HOST_ARCH_MIPS && V8_TARGET_ARCH_MIPS
 #include "src/codegen/mips/register-mips.h"
-#elif V8_HOST_ARCH_MIPS64
+#elif V8_HOST_ARCH_MIPS64 && V8_TARGET_ARCH_MIPS64
 #include "src/codegen/mips64/register-mips64.h"
 #endif
 
@@ -26,14 +29,15 @@ namespace internal {
 
 #if V8_CC_MSVC
 // msvc only support inline assembly on x86
-#if V8_HOST_ARCH_IA32
+#if V8_HOST_ARCH_IA32 && V8_TARGET_ARCH_IA32
 #define CLOBBER_REGISTER(R) __asm xorps R, R
 
 #endif
 
 #else  // !V8_CC_MSVC
 
-#if V8_HOST_ARCH_X64 || V8_HOST_ARCH_IA32
+#if (V8_HOST_ARCH_X64 && V8_TARGET_ARCH_X64) || \
+    (V8_HOST_ARCH_IA32 && V8_TARGET_ARCH_IA32)
 #define CLOBBER_REGISTER(R) \
   __asm__ volatile(         \
       "xorps "              \
@@ -42,20 +46,19 @@ namespace internal {
       "%%" #R ::            \
           :);
 
-#elif V8_HOST_ARCH_ARM64
+#elif V8_HOST_ARCH_ARM64 && V8_TARGET_ARCH_ARM64
 #define CLOBBER_REGISTER(R) __asm__ volatile("fmov " #R ",xzr" :::);
 
-#elif V8_HOST_ARCH_LOONG64
+#elif V8_HOST_ARCH_LOONG64 && V8_TARGET_ARCH_LOONG64
 #define CLOBBER_REGISTER(R) __asm__ volatile("movgr2fr.d $" #R ",$zero" :::);
 
-#elif V8_HOST_ARCH_MIPS
+#elif V8_HOST_ARCH_MIPS && V8_TARGET_ARCH_MIPS
 #define CLOBBER_USE_REGISTER(R) __asm__ volatile("mtc1 $zero,$" #R :::);
 
-#elif V8_HOST_ARCH_MIPS64
+#elif V8_HOST_ARCH_MIPS64 && V8_TARGET_ARCH_MIPS64
 #define CLOBBER_USE_REGISTER(R) __asm__ volatile("dmtc1 $zero,$" #R :::);
 
-#endif  // V8_HOST_ARCH_X64 || V8_HOST_ARCH_IA32 || V8_HOST_ARCH_ARM64 ||
-        // V8_HOST_ARCH_LOONG64 || V8_HOST_ARCH_MIPS || V8_HOST_ARCH_MIPS64
+#endif  // V8_HOST_ARCH_XXX && V8_TARGET_ARCH_XXX
 
 #endif  // V8_CC_MSVC