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boards/meshme: Add adc support
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luisan00 committed Jul 15, 2022
1 parent fc0d48b commit 15ee5ee
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Showing 4 changed files with 71 additions and 33 deletions.
6 changes: 3 additions & 3 deletions boards/meshme/board.c
Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2022 Mesh4all <mesh4all.org>
* Copyright (c) 2022 Mesh4all mesh4all.org
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
Expand All @@ -15,9 +15,9 @@
*/

/**
* @file
* @file board.c
* @brief Board specific implementations for the MeshMe board
* @copyright Copyright (c) 2022 Mesh for All (Mesh4all)
* @copyright Copyright (c) 2022 Mesh4All [email protected]
*/
#include "board.h"
#include "cpu.h"
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39 changes: 18 additions & 21 deletions boards/meshme/include/board.h
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@@ -1,6 +1,6 @@
/*
* Copyright (C) 2014 Loci Controls Inc.
* Copyright (C) 2022 Mesh4all <contact@mesh4all.org>
* Copyright (C) 2022 Mesh4all mesh4all.org
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
Expand All @@ -10,10 +10,8 @@
/**
* @ingroup boards_meshme
* @{
*
* @file
* @brief Board specific definitions for the MeshMe 24G20P
*
* @file board.h
* @brief Board specific definitions for the Meshme board
* @author Ian Martin <[email protected]>
* @author Luis A. Ruiz <[email protected]>
*/
Expand All @@ -32,22 +30,22 @@ extern "C" {
* @name LED pin definitions and handlers
* @{
*/
#define LED0_PIN GPIO_PIN(PORT_C, 5) /*!< LED-0 (?) routed to PC5 pin */
#define LED0_ON gpio_set(LED0_PIN) /*!< LED-0 On handler */
#define LED0_OFF gpio_clear(LED0_PIN) /*!< LED-0 Off handler */
#define LED0_TOGGLE gpio_toggle(LED0_PIN) /*!< LED-0 Toggle handler */
#define LED0_PIN GPIO_PIN(PORT_C, 5) /*!< LED0 (?) routed to PC5 pin */
#define LED0_ON gpio_set(LED0_PIN) /*!< LED0 On handler */
#define LED0_OFF gpio_clear(LED0_PIN) /*!< LED0 Off handler */
#define LED0_TOGGLE gpio_toggle(LED0_PIN) /*!< LED0 Toggle handler */

#define LED1_PIN GPIO_PIN(PORT_C, 4) /*!< LED-1 (green) routed to PC4 pin */
#define LED1_ON gpio_set(LED1_PIN) /*!< LED-1 On handler */
#define LED1_OFF gpio_clear(LED1_PIN) /*!< LED-1 Off handler */
#define LED1_TOGGLE gpio_toggle(LED1_PIN) /*!< LED-1 Toggle handler */
#define LED1_PIN GPIO_PIN(PORT_C, 4) /*!< LED1 (green) routed to PC4 pin */
#define LED1_ON gpio_set(LED1_PIN) /*!< LED1 On handler */
#define LED1_OFF gpio_clear(LED1_PIN) /*!< LED1 Off handler */
#define LED1_TOGGLE gpio_toggle(LED1_PIN) /*!< LED1 Toggle handler */

#define LED2_PIN GPIO_PIN(PORT_C, 1) /*!< LED 2 (orange) routed to PC1 pin */
#define LED2_PIN GPIO_PIN(PORT_C, 1) /*!< LED2 (orange) routed to PC1 pin */
#define LED2_ON gpio_set(LED2_PIN) /*!< LED2 On handler */
#define LED2_OFF gpio_clear(LED2_PIN) /*!< LED2 Off handler */
#define LED2_TOGGLE gpio_toggle(LED2_PIN) /*!< LED2 Toggle handler */

#define LED3_PIN GPIO_PIN(PORT_C, 0) /*!< LED 3 (red) routed to PC0 pin */
#define LED3_PIN GPIO_PIN(PORT_C, 0) /*!< LED3 (red) routed to PC0 pin */
#define LED3_ON gpio_set(LED3_PIN) /*!< LED3 On handler */
#define LED3_OFF gpio_clear(LED3_PIN) /*!< LED3 Off handler */
#define LED3_TOGGLE gpio_toggle(LED3_PIN) /*!< LED3 Toggle handler */
Expand Down Expand Up @@ -86,14 +84,14 @@ extern "C" {
* @name xtimer configuration
* @{
*/
#define XTIMER_WIDTH (16) /*!< ToDo */
#define XTIMER_BACKOFF (50) /*!< ToDo */
#define XTIMER_ISR_BACKOFF (40) /*!< ToDo */
#define XTIMER_WIDTH (16) /*!< TODO */
#define XTIMER_BACKOFF (50) /*!< TODO */
#define XTIMER_ISR_BACKOFF (40) /*!< TODO */
/** @} */

/**
* @name RF Front-End configuration
*
* @{
* @brief The FE CC2592 is controlled by the CC2538 with 3 pins, both are connected as follow:
*
* | CC2538 (MCU) | CC2592 (FE) | Description |
Expand All @@ -102,8 +100,7 @@ extern "C" {
* | PORT_C, 2 | LNA_EN | Low Noise Amplifier (enabled/disabled) |
* | PORT_C, 3 | PA_EN | Power Amplifier (enabled/disabled) |
*
* The CC2538 RF Core needs to use "observable signals" to drive the LNA_EN and the PA_EN pins
* @{
* The CC2538 RF Core needs to use the "observable signals" to drive the LNA_EN and the PA_EN pins
*/
#define CONFIG_CC2538_RF_OBS_SIG_0_PCX 3 /*!< tx active to PC3, it controls the PA */
#define CONFIG_CC2538_RF_OBS_SIG_1_PCX 2 /*!< rx active to PC2, it controls the LNA */
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6 changes: 3 additions & 3 deletions boards/meshme/include/gpio_params.h
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
/*
* Copyright (C) 2017 DAI Labor Technische Universität Berlin
* Copyright (C) 2022 Mesh4all <contact@mesh4all.org>
* Copyright (C) 2022 Mesh4all mesh4all.org
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
Expand All @@ -10,11 +10,11 @@
/**
* @ingroup boards_meshme
* @{
*
* @file
* @file gpio_params.h
* @brief Board specific configuration of direct mapped GPIOs
*
* @author Anon Mall <[email protected]>
* @author Luis A. Ruiz <[email protected]>
*/

#ifndef GPIO_PARAMS_H
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53 changes: 47 additions & 6 deletions boards/meshme/include/periph_conf.h
Original file line number Diff line number Diff line change
Expand Up @@ -11,11 +11,10 @@
* @ingroup boards_meshme
* @{
*
* @file
* @brief Peripheral MCU configuration for the MeshMe board
*
* @file periph_conf.h
* @brief Peripheral MCU configuration for the Meshme board
* @author Anon Mall <[email protected]>
* @author luisan00 <[email protected]>
* @author Luis A. Ruiz <[email protected]>
*/

#ifndef PERIPH_CONF_H
Expand All @@ -29,17 +28,59 @@ extern "C" {

#include "cpu.h"
#include "periph_cpu.h"
#include "periph/cpuid.h"
//#include "periph/cpuid.h"

#include "cfg_clk_default.h"
#include "cfg_timer_default.h"

/**
* @name UART configuration
* @name [A]nalog to [D]igital [C]onverter configuration
* @{
*/
/**
* @brief Selected [default] voltage reference is [SOC_ADC_ADCCON3_EREF_EXT],
* this can be changed according to the following table:
*
* | Register | Description |
* |:---------------------------|:-------------------------------|
* | SOC_ADC_ADCCON3_EREF_INT | Internal reference |
* | SOC_ADC_ADCCON3_EREF_EXT | External reference on AIN7 pin |
* | SOC_ADC_ADCCON3_EREF_AVDD5 | AVDD5 pin |
* | SOC_ADC_ADCCON3_EREF_DIFF | External reference on AIN6-AIN7 differential input |
*
* @note default is [SOC_ADC_ADCCON3_EREF_EXT]
*/
#define SOC_ADC_ADCCON3_EREF SOC_ADC_ADCCON3_EREF_AVDD5

/**
* @brief Selected default resolution is [ADC_RES_12BIT]
* but it can be changed according the next table:
*
* | Register | Description |
* |:--------------|:-----------------------------|
* | ADC_RES_7BIT | 7 bits per sample resolution |
* | ADC_RES_9BIT | 9 bits per sample "" |
* | ADC_RES_10BIT | 10 bits per sample "" |
* | ADC_RES_12BIT | 12 bits per sample "" |
*
* @note default is [ADC_RES_12BIT]
*/
#define SOC_ADC_RES ADC_RES_12BIT

/**
* @brief Available ADC lines
*/
static const adc_conf_t adc_config[] = {
GPIO_PIN(PORT_A, 6), /*!< GPIO_PA6 as ADC input */
GPIO_PIN(PORT_A, 7), /*!< GPIO_PA7 as ADC input */
};

#define ADC_NUMOF ARRAY_SIZE(adc_config) /*!< Number of available adc lines */
/** @} */

/**
* @name UART configuration
* @{
* @brief List of available UART ports, pins are mapped as follows:
*
* | UART Dev | TX pin | RX pin | CTS pin| RTS pin |
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