add all the rest parts of extension

KhronosGroup · Feb 8, 2024 · 9f88eae · 9f88eae
1 parent 9ed2063
commit 9f88eae
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Showing 3 changed files with 50 additions and 9 deletions.
diff --git a/lib/SPIRV/SPIRVReader.cpp b/lib/SPIRV/SPIRVReader.cpp
@@ -4318,8 +4318,6 @@ bool SPIRVToLLVM::transMetadata() {
       F->setMetadata(kSPIR2MD::IntelFPGAIPInterface,
                      MDNode::get(*Context, InterfaceMDVec));
     }
-    // TODO: Also add support for ExecutionModeMaximumRegistersIdINTEL and
-    // ExecutionModeNamedMaximumRegistersINTEL
     if (auto *EM = BF->getExecutionMode(
             internal::ExecutionModeMaximumRegistersINTEL)) {
       NamedMDNode *ExecModeMD =
@@ -4333,6 +4331,37 @@ bool SPIRVToLLVM::transMetadata() {
           ConstantAsMetadata::get(getUInt32(M, EM->getLiterals()[0])));
       ExecModeMD->addOperand(MDNode::get(*Context, ValueVec));
     }
+    if (auto *EM = BF->getExecutionMode(
+            internal::ExecutionModeMaximumRegistersIdINTEL)) {
+      NamedMDNode *ExecModeMD =
+          M->getOrInsertNamedMetadata(kSPIRVMD::ExecutionMode);
+
+      SmallVector<Metadata *, 4> ValueVec;
+      ValueVec.push_back(ConstantAsMetadata::get(F));
+      ValueVec.push_back(
+          ConstantAsMetadata::get(getUInt32(M, EM->getExecutionMode())));
+
+      auto *ExecOp = BF->getModule()->getValue(EM->getLiterals()[0]);
+      ValueVec.push_back(
+          MDNode::get(*Context, ConstantAsMetadata::get(cast<ConstantInt>(
+                                    transValue(ExecOp, nullptr, nullptr)))));
+      ExecModeMD->addOperand(MDNode::get(*Context, ValueVec));
+    }
+    if (auto *EM = BF->getExecutionMode(
+            internal::ExecutionModeNamedMaximumRegistersINTEL)) {
+      NamedMDNode *ExecModeMD =
+          M->getOrInsertNamedMetadata(kSPIRVMD::ExecutionMode);
+
+      SmallVector<Metadata *, 4> ValueVec;
+      ValueVec.push_back(ConstantAsMetadata::get(F));
+      ValueVec.push_back(
+          ConstantAsMetadata::get(getUInt32(M, EM->getExecutionMode())));
+
+      assert(EM->getLiterals()[0] == 0 &&
+             "Invalid named maximum number of registers");
+      ValueVec.push_back(MDString::get(*Context, "AutoINTEL"));
+      ExecModeMD->addOperand(MDNode::get(*Context, ValueVec));
+    }
   }
   NamedMDNode *MemoryModelMD =
       M->getOrInsertNamedMetadata(kSPIRVMD::MemoryModel);

diff --git a/lib/SPIRV/SPIRVWriter.cpp b/lib/SPIRV/SPIRVWriter.cpp
@@ -1126,7 +1126,6 @@ void LLVMToSPIRVBase::transFunctionMetadataAsExecutionMode(SPIRVFunction *BF,
   if (!BM->isAllowedToUseExtension(ExtensionID::SPV_INTEL_maximum_registers))
     return;
 
-  // TODO: Also add support for ExecutionModeMaximumRegistersIdINTEL
   if (auto *RegisterAllocModeMD = F->getMetadata("RegisterAllocMode")) {
     auto *RegisterAllocMode = RegisterAllocModeMD->getOperand(0).get();
     if (isa<MDString>(RegisterAllocMode)) {
@@ -1135,6 +1134,15 @@ void LLVMToSPIRVBase::transFunctionMetadataAsExecutionMode(SPIRVFunction *BF,
         BF->addExecutionMode(BM->add(new SPIRVExecutionMode(
             OpExecutionMode, BF,
             internal::ExecutionModeNamedMaximumRegistersINTEL, 0)));
+    } else if (isa<MDNode>(RegisterAllocMode)) {
+      auto *RegisterAllocNodeMDOp =
+          getMDOperandAsMDNode(RegisterAllocModeMD, 0);
+      int Num = getMDOperandAsInt(RegisterAllocNodeMDOp, 0);
+      auto *Const =
+          BM->addConstant(transType(Type::getInt32Ty(F->getContext())), Num);
+      BF->addExecutionMode(BM->add(new SPIRVExecutionMode(
+          OpExecutionModeId, BF, internal::ExecutionModeMaximumRegistersIdINTEL,
+          Const->getId())));
     } else {
       int64_t RegisterAllocNodeMDOp =
           mdconst::dyn_extract<ConstantInt>(RegisterAllocMode)->getZExtValue();

diff --git a/test/extensions/INTEL/SPV_INTEL_maximum_registers/registerallocmode_maxreg_extension.ll b/test/extensions/INTEL/SPV_INTEL_maximum_registers/registerallocmode_maxreg_extension.ll
@@ -13,16 +13,19 @@
 
 ; CHECK-SPIRV: ExecutionMode [[#FUNC0]] 6461 2
 ; CHECK-SPIRV: ExecutionMode [[#FUNC1]] 6461 1
-; CHECK-SPIRV: ExecutionMode [[#FUNC2]] 6461 0
-; CHECK-SPIRV: ExecutionMode [[#FUNC3]] 6461 3
+; CHECK-SPIRV: ExecutionMode [[#FUNC2]] 6463 0
+; CHECK-SPIRV: ExecutionModeId [[#FUNC3]] 6462 [[#Const3:]]
+; CHECK-SPIRV: TypeInt [[#TypeInt:]] 32 0
+; CHECK-SPIRV: Constant [[#TypeInt]] [[#Const3]] 3
 
 ; CHECK-SPIRV-NOT: ExecutionMode [[#FUNC4]]
 
 ; CHECK-LLVM: !spirv.ExecutionMode = !{![[#FLAG0:]], ![[#FLAG1:]], ![[#FLAG2:]], ![[#FLAG3:]]}
 ; CHECK-LLVM: ![[#FLAG0]] = !{ptr @main_l3, i32 6461, i32 2}
 ; CHECK-LLVM: ![[#FLAG1]] = !{ptr @main_l6, i32 6461, i32 1}
-; CHECK-LLVM: ![[#FLAG2]] = !{ptr @main_l9, i32 6461, i32 0}
-; CHECK-LLVM: ![[#FLAG3]] = !{ptr @main_l13, i32 6461, i32 3}
+; CHECK-LLVM: ![[#FLAG2]] = !{ptr @main_l9, i32 6463, !"AutoINTEL"}
+; CHECK-LLVM: ![[#FLAG3]] = !{ptr @main_l13, i32 6462, ![[#VAL:]]}
+; CHECK-LLVM: ![[#VAL]] = !{i32 3}
 
 target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-n8:16:32:64"
 target triple = "spir64"
@@ -77,5 +80,6 @@ attributes #0 = { noinline nounwind optnone }
 !9 = !{i32 2, i32 2}
 !10 = !{i32 2}
 !11 = !{i32 1}
-!12 = !{i32 0}
-!13 = !{i32 3}
+!12 = !{!"AutoINTEL"}
+!13 = !{!14}
+!14 = !{i32 3}