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Headers support for SPV_INTEL_maximum_registers extension #416

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Feb 28, 2024
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Headers support for SPV_INTEL_maximum_registers extension #416

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18545d4
Headers support for SPV_INTEL_maximum_registers extension
vmaksimo Feb 8, 2024
f4802b4
Use an operand kind for the named maximum number of registers
vmaksimo Feb 14, 2024
0000d08
apply CI suggestions
vmaksimo Feb 14, 2024
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4 changes: 4 additions & 0 deletions include/spirv/unified1/spirv.bf
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Original file line number Diff line number Diff line change
Expand Up @@ -212,6 +212,9 @@ namespace Spv
StreamingInterfaceINTEL = 6154,
RegisterMapInterfaceINTEL = 6160,
NamedBarrierCountINTEL = 6417,
MaximumRegistersINTEL = 6461,
MaximumRegistersIdINTEL = 6462,
NamedMaximumRegistersINTEL = 6463,
}

[AllowDuplicates, CRepr] public enum StorageClass
Expand Down Expand Up @@ -1227,6 +1230,7 @@ namespace Spv
GroupUniformArithmeticKHR = 6400,
MaskedGatherScatterINTEL = 6427,
CacheControlsINTEL = 6441,
RegisterLimitsINTEL = 6460,
}

[AllowDuplicates, CRepr] public enum RayFlagsShift
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33 changes: 33 additions & 0 deletions include/spirv/unified1/spirv.core.grammar.json
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Expand Up @@ -11596,6 +11596,33 @@
],
"capabilities" : [ "VectorComputeINTEL" ],
"version" : "None"
},
{
"enumerant" : "MaximumRegistersINTEL",
"value" : 6461,
"parameters" : [
{ "kind" : "LiteralInteger", "name" : "'Number of Registers'" }
],
"capabilities" : [ "RegisterLimitsINTEL" ],
"version" : "None"
},
{
"enumerant" : "MaximumRegistersIdINTEL",
"value" : 6462,
"parameters" : [
{ "kind" : "IdRef", "name" : "'Number of Registers'" }
],
"capabilities" : [ "RegisterLimitsINTEL" ],
"version" : "None"
},
{
"enumerant" : "NamedMaximumRegistersINTEL",
"value" : 6463,
"parameters" : [
{ "kind" : "LiteralInteger", "name" : "'Named Maximum Number of Registers'" }
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@MrSidims MrSidims Feb 8, 2024 •
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Question goes to @bashbaug , with the spelling from KhronosGroup/SPIRV-Registry#235 "kind" : "LiteralInteger" seems to be correct. But I have a feeling, that intention here should be to change kind to "kind" : "NamedMaximumNumberofRegisters" binding the parameter with possible values to be used by validator. So, should we adjust the spec a bit for this? Not sure if I have enough understanding, when we should spell out possible values for a literal parameter.

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Good catch - I do think this would make validation easier, and the disassembled SPIR-V might be a little nicer also.

Can you have a look at my suggested change on the spec PR to be sure this is what you're thinking of?
KhronosGroup/SPIRV-Registry#235 (comment)

Let me know if you need help with any other tooling, also.

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I accepted the spec suggestion. Let's go with the "NamedMaximumNumberOfRegisters" "kind". Thanks!

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Create a PR to Tools to support operand kind there too: KhronosGroup/SPIRV-Tools#5580

],
"capabilities" : [ "RegisterLimitsINTEL" ],
"version" : "None"
}
]
},
Expand Down Expand Up @@ -16454,6 +16481,12 @@
"value" : 6441,
"extensions" : [ "SPV_INTEL_cache_controls" ],
"version" : "None"
},
{
"enumerant" : "RegisterLimitsINTEL",
"value" : 6460,
"extensions" : [ "SPV_INTEL_maximum_registers" ],
"version" : "None"
}
]
},
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4 changes: 4 additions & 0 deletions include/spirv/unified1/spirv.cs
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Expand Up @@ -211,6 +211,9 @@ public enum ExecutionMode
StreamingInterfaceINTEL = 6154,
RegisterMapInterfaceINTEL = 6160,
NamedBarrierCountINTEL = 6417,
MaximumRegistersINTEL = 6461,
MaximumRegistersIdINTEL = 6462,
NamedMaximumRegistersINTEL = 6463,
}

public enum StorageClass
Expand Down Expand Up @@ -1226,6 +1229,7 @@ public enum Capability
GroupUniformArithmeticKHR = 6400,
MaskedGatherScatterINTEL = 6427,
CacheControlsINTEL = 6441,
RegisterLimitsINTEL = 6460,
}

public enum RayFlagsShift
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4 changes: 4 additions & 0 deletions include/spirv/unified1/spirv.h
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Original file line number Diff line number Diff line change
Expand Up @@ -219,6 +219,9 @@ typedef enum SpvExecutionMode_ {
SpvExecutionModeStreamingInterfaceINTEL = 6154,
SpvExecutionModeRegisterMapInterfaceINTEL = 6160,
SpvExecutionModeNamedBarrierCountINTEL = 6417,
SpvExecutionModeMaximumRegistersINTEL = 6461,
SpvExecutionModeMaximumRegistersIdINTEL = 6462,
SpvExecutionModeNamedMaximumRegistersINTEL = 6463,
SpvExecutionModeMax = 0x7fffffff,
} SpvExecutionMode;

Expand Down Expand Up @@ -1226,6 +1229,7 @@ typedef enum SpvCapability_ {
SpvCapabilityGroupUniformArithmeticKHR = 6400,
SpvCapabilityMaskedGatherScatterINTEL = 6427,
SpvCapabilityCacheControlsINTEL = 6441,
SpvCapabilityRegisterLimitsINTEL = 6460,
SpvCapabilityMax = 0x7fffffff,
} SpvCapability;

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4 changes: 4 additions & 0 deletions include/spirv/unified1/spirv.hpp
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Original file line number Diff line number Diff line change
Expand Up @@ -215,6 +215,9 @@ enum ExecutionMode {
ExecutionModeStreamingInterfaceINTEL = 6154,
ExecutionModeRegisterMapInterfaceINTEL = 6160,
ExecutionModeNamedBarrierCountINTEL = 6417,
ExecutionModeMaximumRegistersINTEL = 6461,
ExecutionModeMaximumRegistersIdINTEL = 6462,
ExecutionModeNamedMaximumRegistersINTEL = 6463,
ExecutionModeMax = 0x7fffffff,
};

Expand Down Expand Up @@ -1222,6 +1225,7 @@ enum Capability {
CapabilityGroupUniformArithmeticKHR = 6400,
CapabilityMaskedGatherScatterINTEL = 6427,
CapabilityCacheControlsINTEL = 6441,
CapabilityRegisterLimitsINTEL = 6460,
CapabilityMax = 0x7fffffff,
};

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4 changes: 4 additions & 0 deletions include/spirv/unified1/spirv.hpp11
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Expand Up @@ -215,6 +215,9 @@ enum class ExecutionMode : unsigned {
StreamingInterfaceINTEL = 6154,
RegisterMapInterfaceINTEL = 6160,
NamedBarrierCountINTEL = 6417,
MaximumRegistersINTEL = 6461,
MaximumRegistersIdINTEL = 6462,
NamedMaximumRegistersINTEL = 6463,
Max = 0x7fffffff,
};

Expand Down Expand Up @@ -1222,6 +1225,7 @@ enum class Capability : unsigned {
GroupUniformArithmeticKHR = 6400,
MaskedGatherScatterINTEL = 6427,
CacheControlsINTEL = 6441,
RegisterLimitsINTEL = 6460,
Max = 0x7fffffff,
};

Expand Down
8 changes: 6 additions & 2 deletions include/spirv/unified1/spirv.json
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Expand Up @@ -233,7 +233,10 @@
"FPFastMathDefault": 6028,
"StreamingInterfaceINTEL": 6154,
"RegisterMapInterfaceINTEL": 6160,
"NamedBarrierCountINTEL": 6417
"NamedBarrierCountINTEL": 6417,
"MaximumRegistersINTEL": 6461,
"MaximumRegistersIdINTEL": 6462,
"NamedMaximumRegistersINTEL": 6463
}
},
{
Expand Down Expand Up @@ -1198,7 +1201,8 @@
"GlobalVariableFPGADecorationsINTEL": 6189,
"GroupUniformArithmeticKHR": 6400,
"MaskedGatherScatterINTEL": 6427,
"CacheControlsINTEL": 6441
"CacheControlsINTEL": 6441,
"RegisterLimitsINTEL": 6460
}
},
{
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4 changes: 4 additions & 0 deletions include/spirv/unified1/spirv.lua
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Expand Up @@ -202,6 +202,9 @@ spv = {
StreamingInterfaceINTEL = 6154,
RegisterMapInterfaceINTEL = 6160,
NamedBarrierCountINTEL = 6417,
MaximumRegistersINTEL = 6461,
MaximumRegistersIdINTEL = 6462,
NamedMaximumRegistersINTEL = 6463,
},

StorageClass = {
Expand Down Expand Up @@ -1184,6 +1187,7 @@ spv = {
GroupUniformArithmeticKHR = 6400,
MaskedGatherScatterINTEL = 6427,
CacheControlsINTEL = 6441,
RegisterLimitsINTEL = 6460,
},

RayFlagsShift = {
Expand Down
4 changes: 4 additions & 0 deletions include/spirv/unified1/spirv.py
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Expand Up @@ -202,6 +202,9 @@
'StreamingInterfaceINTEL' : 6154,
'RegisterMapInterfaceINTEL' : 6160,
'NamedBarrierCountINTEL' : 6417,
'MaximumRegistersINTEL' : 6461,
'MaximumRegistersIdINTEL' : 6462,
'NamedMaximumRegistersINTEL' : 6463,
},

'StorageClass' : {
Expand Down Expand Up @@ -1184,6 +1187,7 @@
'GroupUniformArithmeticKHR' : 6400,
'MaskedGatherScatterINTEL' : 6427,
'CacheControlsINTEL' : 6441,
'RegisterLimitsINTEL' : 6460,
},

'RayFlagsShift' : {
Expand Down
4 changes: 4 additions & 0 deletions include/spirv/unified1/spv.d
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Expand Up @@ -214,6 +214,9 @@ enum ExecutionMode : uint
StreamingInterfaceINTEL = 6154,
RegisterMapInterfaceINTEL = 6160,
NamedBarrierCountINTEL = 6417,
MaximumRegistersINTEL = 6461,
MaximumRegistersIdINTEL = 6462,
NamedMaximumRegistersINTEL = 6463,
}

enum StorageClass : uint
Expand Down Expand Up @@ -1229,6 +1232,7 @@ enum Capability : uint
GroupUniformArithmeticKHR = 6400,
MaskedGatherScatterINTEL = 6427,
CacheControlsINTEL = 6441,
RegisterLimitsINTEL = 6460,
}

enum RayFlagsShift : uint
Expand Down