Upload lwip-network-interface-integration 1.1.0.229 [271]

Infineon · Dec 14, 2022 · e6ef4e4 · e6ef4e4
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diff --git a/README.md b/README.md
@@ -32,7 +32,9 @@ This library and its features are supported on the following platforms:
 
 - [XMC7200D-E272K8384 kit (KIT-XMC72-EVK)](https://www.infineon.com/KIT_XMC72_EVK)
 
-- [XMC4700/XMC4800 relax kit (KIT-XMC47-V1)](https://www.infineon.com/cms/en/product/evaluation-boards/kit_xmc47_relax_v1)
+- [XMC4700 Relax Kit (KIT_XMC47_RELAX_V1)](https://www.infineon.com/cms/en/product/evaluation-boards/kit_xmc47_relax_v1/)
+
+- [XMC4800 Relax EtherCAT Kit (KIT_XMC48_RELAX_ECAT_V1)](https://www.infineon.com/cms/en/product/evaluation-boards/kit_xmc48_relax_ecat_v1/)
 
 ## Log messages
 

diff --git a/RELEASE.md b/RELEASE.md
@@ -6,6 +6,12 @@ See the [README.md](./README.md) for a complete description of the [lwIP network
 
 ## Changelog
 
+### v1.1.0
+
+- Added support for KIT-XMC72-EVK kit
+
+- Minor documentation update
+
 ### v1.0.0
 
 - Initial release for lwIP network interface integration library

diff --git a/docs/api_reference_manual/html/group__generic__lwip__whd__port__defines.html b/docs/api_reference_manual/html/group__generic__lwip__whd__port__defines.html
@@ -104,7 +104,7 @@
 
 Refer to the macro section of this document for library-specific error codes.
 </pre><p >The data structure cy_rslt_t is part of cy_result.h located in &lt;core_lib/include&gt;.</p>
-<p >Module base: This base is derived from CY_RSLT_MODULE_MIDDLEWARE_BASE (defined in cy_result.h) and is an offset of the CY_RSLT_MODULE_MIDDLEWARE_BASE. The details of the offset and the middleware base are defined in cy_result_mw.h, that is part of <a href="https://github.com/cypresssemiconductorco/connectivity-utilities">Github connectivity-utilities</a>. For example, lwIP WHD PORT (CY_NETWORK_PORT) uses CY_RSLT_MODULE_NETWORK_PORT_BASE as the module base.</p>
+<p >Module base: This base is derived from CY_RSLT_MODULE_MIDDLEWARE_BASE (defined in cy_result.h) and is an offset of the CY_RSLT_MODULE_MIDDLEWARE_BASE. The details of the offset and the middleware base are defined in cy_result_mw.h, that is part of <a href="https://github.com/infineon/connectivity-utilities">Github connectivity-utilities</a>. For example, lwIP WHD PORT (CY_NETWORK_PORT) uses CY_RSLT_MODULE_NETWORK_PORT_BASE as the module base.</p>
 <p >Type: This type is defined in cy_result.h and can be one of CY_RSLT_TYPE_FATAL, CY_RSLT_TYPE_ERROR, CY_RSLT_TYPE_WARNING, or CY_RSLT_TYPE_INFO. AWS library error codes are of type CY_RSLT_TYPE_ERROR.</p>
 <p >Library-specific error codes: These error codes are library-specific and defined in the macro section.</p>
 <p >Helper macros used for creating the library-specific result are provided as part of cy_result.h. </p>

diff --git a/docs/api_reference_manual/html/group__group__optimization__config.html b/docs/api_reference_manual/html/group__group__optimization__config.html
@@ -89,8 +89,8 @@
 <p >For PSoC 6 MCU family of chips and Wi-Fi/BT connectivity chips that have limited flash and RAM footprint, there is a need to optimize the various connectivity middleware components to fit into kits that use these chips. </p>
 <p >Examples include CY8CPROTO-062S3-4343W that has 512KB flash and 256KB SRAM.</p>
 <p >The default lwIP and Mbed TLS configuration files bundled with the Wi-Fi Middleware Core have serveral features enabled for typical embedded IoT use cases. However, not all of these parameters are pertinent for every use case. The approach is to provide a set of such tunables that can be turned off in order to conserve memory, thus enabling the firmware to fit into the available flash and RAM.</p>
-<p >The lwIP parameters are defined in <a href="https://github.com/cypresssemiconductorco/wifi-mw-core/configs/lwipopts.h">lwipopts.h</a>. Modify this header file to customize the lwIP parameters defined in the table below.</p>
-<p >For Mbed TLS, a default config.h file is bundled with the Mbed TLS library. It is not recommended to modify the default config header file; you should modify the user-defined <a href="https://github.com/cypresssemiconductorco/wifi-mw-core/configs/mbedtls_user_config.h">mbedtls_user_config.h</a> file bundled with Wi-Fi Middleware Core. The approach is to update the mbedtls_user_config.h file to override the default behavior defined in the config.h file. Note that this mbedtls_user_config.h file has been tuned with several options to conserve memory for common embedded IoT use cases from the default config.h file, amounting to approx. 16KB of code memory savings. The following recommendations are additional optimizations.</p>
+<p >The lwIP parameters are defined in <a href="https://github.com/infineon/wifi-mw-core/configs/lwipopts.h">lwipopts.h</a>. Modify this header file to customize the lwIP parameters defined in the table below.</p>
+<p >For Mbed TLS, a default config.h file is bundled with the Mbed TLS library. It is not recommended to modify the default config header file; you should modify the user-defined <a href="https://github.com/infineon/wifi-mw-core/configs/mbedtls_user_config.h">mbedtls_user_config.h</a> file bundled with Wi-Fi Middleware Core. The approach is to update the mbedtls_user_config.h file to override the default behavior defined in the config.h file. Note that this mbedtls_user_config.h file has been tuned with several options to conserve memory for common embedded IoT use cases from the default config.h file, amounting to approx. 16KB of code memory savings. The following recommendations are additional optimizations.</p>
 <p >The configurations listed below provide savings to one of the following: code memory, static RAM, or heap memory. Some parameters may save code memory at the cost of heap/SRAM.</p>
 <p >The savings are mentioned in kilobytes, and are an estimate (computed in DEBUG build). Actual values may differ from the numbers provided below.</p>
 <h1><a class="anchor" id="optim_mbedTLS"></a>

diff --git a/docs/api_reference_manual/html/index.html b/docs/api_reference_manual/html/index.html
@@ -103,7 +103,9 @@ <h1><a class="anchor" id="section_platforms"></a>
 <p ><a href="https://www.infineon.com/cms/en/product/evaluation-boards/cyw954907aeval1f">CYW954907AEVAL1F Evaluation Kit(CYW954907AEVAL1F)</a></p>
 <p ><a href="https://www.infineon.com/cms/en/product/evaluation-boards/cyw943907aeval1f">CYW943907AEVAL1F Evaluation Kit(CYW943907AEVAL1F)</a></p>
 <p ><a href="https://www.infineon.com/cms/en/product/evaluation-boards/cy8ceval-062s2">PSoC&trade; 62S2 evaluation kit (CY8CEVAL-062S2-MUR-43439M2)</a></p>
-<p ><a href="https://www.infineon.com/KIT_XMC72_EVK">XMC7200D-E272K8384 kit (KIT-XMC72-EVK)</a> </p>
+<p ><a href="https://www.infineon.com/KIT_XMC72_EVK">XMC7200D-E272K8384 kit (KIT-XMC72-EVK)</a></p>
+<p ><a href="https://www.infineon.com/cms/en/product/evaluation-boards/kit_xmc47_relax_v1/">XMC4700 Relax Kit (KIT_XMC47_RELAX_V1)</a></p>
+<p ><a href="https://www.infineon.com/cms/en/product/evaluation-boards/kit_xmc48_relax_ecat_v1/">XMC4800 Relax EtherCAT Kit (KIT_XMC48_RELAX_ECAT_V1)</a> </p>
 </div></div><!-- PageDoc -->
 </div><!-- contents -->
 </div><!-- doc-content -->

diff --git a/docs/api_reference_manual/html/search/all_1.js b/docs/api_reference_manual/html/search/all_1.js
diff --git a/include/cy_network_mw_core.h b/include/cy_network_mw_core.h
@@ -45,6 +45,7 @@
 
 #include "cy_result.h"
 #include "cy_nw_helper.h"
+#include "cy_nw_mw_core_error.h"
 
 #ifdef __cplusplus
 extern "C" {