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Added step in verif.py where the number of cycles is determined to pr…
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…event issues with -1 argument
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Vedad Hadžić committed Sep 26, 2024
1 parent c9338d8 commit 95c80df
Showing 1 changed file with 10 additions and 0 deletions.
10 changes: 10 additions & 0 deletions verify.py
Original file line number Diff line number Diff line change
Expand Up @@ -237,6 +237,16 @@ def main():
module = circuit_json["modules"][args.top_module]
label_dict = generate_labeling(args.label_file_path, module)
ignored_set = generate_ignored(safe_graph, module, args.ignored)

# find out how many cycles there really are
dummy_trace = VCDStorage(args.vcd_file_path)
while dummy_trace.parse_next_cycle():
pass
cycles_upper_bound = (dummy_trace.cycle) - args.rst_cycles
if args.cycles > cycles_upper_bound:
print("Setting number of cycles to %d." % cycles_upper_bound)
args.cycles = cycles_upper_bound
del dummy_trace
trace = VCDStorage(args.vcd_file_path)
checker = SatChecker(label_dict, ignored_set, trace, safe_graph, args)

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