[bot] AutoMerging: merge all upstream's changes:

* https://github.com/coolsnowwolf/lede:
  kernel: backport MGLRU to linux 6.0 for Tianling Shen
  Kernel: bump 5.10 to 5.10.148 (coolsnowwolf#10259)
  kernel: bump 5.19 to 5.19.16
  kernel: bump 6.0 to 6.0.2

include/kernel-5.10

@@ -1,2 +1,2 @@
-LINUX_VERSION-5.10 = .147
-LINUX_KERNEL_HASH-5.10.147 = 85253abf097eb5013b988a400eb022eed0e0626e7e0a7daa3ab4b6bcabbced9a
+LINUX_VERSION-5.10 = .148
+LINUX_KERNEL_HASH-5.10.148 = 12523f6be221067094ec541b196bce70493f7f44f031b3c4711d82e290c6e956

include/kernel-5.19

@@ -1,2 +1,2 @@
-LINUX_VERSION-5.19 = .15
-LINUX_KERNEL_HASH-5.19.15 = 4686e33847db3ec58e1043bc0c806472aae694b2c413bb7d8da91a5c9a55eb1b
+LINUX_VERSION-5.19 = .16
+LINUX_KERNEL_HASH-5.19.16 = a1ebaf667e1059ae2d72aa6374a4d6e2febc0b8ccda6a124687acc2ea961e08d

include/kernel-6.0

@@ -1,2 +1,2 @@
-LINUX_VERSION-6.0 = .1
-LINUX_KERNEL_HASH-6.0.1 = 8ede745a69351ea0f27fe0c48780d4efa37ff086135e129358ce09694957e8f9
+LINUX_VERSION-6.0 = .2
+LINUX_KERNEL_HASH-6.0.2 = a13c26388cacccb684cd9f51109596a280c8186b7e95174d31ee7c5718e95c9d

target/linux/generic/backport-6.0/100-mm-x86-arm64-add-arch_has_hw_pte_young.patch

@@ -0,0 +1,154 @@
+From e3264035bdac67898d685423ffb2f3a9c3a5964a Mon Sep 17 00:00:00 2001
+From: Yu Zhao <[email protected]>
+Date: Wed, 4 Aug 2021 01:31:34 -0600
+Subject: [PATCH 01/14] mm: x86, arm64: add arch_has_hw_pte_young()
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Some architectures automatically set the accessed bit in PTEs, e.g.,
+x86 and arm64 v8.2. On architectures that do not have this capability,
+clearing the accessed bit in a PTE usually triggers a page fault
+following the TLB miss of this PTE (to emulate the accessed bit).
+
+Being aware of this capability can help make better decisions, e.g.,
+whether to spread the work out over a period of time to reduce bursty
+page faults when trying to clear the accessed bit in many PTEs.
+
+Note that theoretically this capability can be unreliable, e.g.,
+hotplugged CPUs might be different from builtin ones. Therefore it
+should not be used in architecture-independent code that involves
+correctness, e.g., to determine whether TLB flushes are required (in
+combination with the accessed bit).
+
+Signed-off-by: Yu Zhao <[email protected]>
+Reviewed-by: Barry Song <[email protected]>
+Acked-by: Brian Geffon <[email protected]>
+Acked-by: Jan Alexander Steffens (heftig) <[email protected]>
+Acked-by: Oleksandr Natalenko <[email protected]>
+Acked-by: Steven Barrett <[email protected]>
+Acked-by: Suleiman Souhlal <[email protected]>
+Acked-by: Will Deacon <[email protected]>
+Tested-by: Daniel Byrne <[email protected]>
+Tested-by: Donald Carr <[email protected]>
+Tested-by: Holger Hoffstätte <[email protected]>
+Tested-by: Konstantin Kharlamov <[email protected]>
+Tested-by: Shuang Zhai <[email protected]>
+Tested-by: Sofia Trinh <[email protected]>
+Tested-by: Vaibhav Jain <[email protected]>
+Change-Id: Ib49b44fb56df3333a2ff1fcc496fb1980b976e7a
+---
+ arch/arm64/include/asm/pgtable.h | 15 ++-------------
+ arch/x86/include/asm/pgtable.h   |  6 +++---
+ include/linux/pgtable.h          | 13 +++++++++++++
+ mm/memory.c                      | 14 +-------------
+ 4 files changed, 19 insertions(+), 29 deletions(-)
+
+diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgtable.h
+index b5df82aa99e6..71a1af42f0e8 100644
+--- a/arch/arm64/include/asm/pgtable.h
++++ b/arch/arm64/include/asm/pgtable.h
+@@ -1082,24 +1082,13 @@ static inline void update_mmu_cache(struct vm_area_struct *vma,
+  * page after fork() + CoW for pfn mappings. We don't always have a
+  * hardware-managed access flag on arm64.
+  */
+-static inline bool arch_faults_on_old_pte(void)
+-{
+-	/* The register read below requires a stable CPU to make any sense */
+-	cant_migrate();
+-
+-	return !cpu_has_hw_af();
+-}
+-#define arch_faults_on_old_pte		arch_faults_on_old_pte
++#define arch_has_hw_pte_young		cpu_has_hw_af
+
+ /*
+  * Experimentally, it's cheap to set the access flag in hardware and we
+  * benefit from prefaulting mappings as 'old' to start with.
+  */
+-static inline bool arch_wants_old_prefaulted_pte(void)
+-{
+-	return !arch_faults_on_old_pte();
+-}
+-#define arch_wants_old_prefaulted_pte	arch_wants_old_prefaulted_pte
++#define arch_wants_old_prefaulted_pte	cpu_has_hw_af
+
+ static inline bool pud_sect_supported(void)
+ {
+diff --git a/arch/x86/include/asm/pgtable.h b/arch/x86/include/asm/pgtable.h
+index 44e2d6f1dbaa..dc5f7d8ef68a 100644
+--- a/arch/x86/include/asm/pgtable.h
++++ b/arch/x86/include/asm/pgtable.h
+@@ -1431,10 +1431,10 @@ static inline bool arch_has_pfn_modify_check(void)
+ 	return boot_cpu_has_bug(X86_BUG_L1TF);
+ }
+
+-#define arch_faults_on_old_pte arch_faults_on_old_pte
+-static inline bool arch_faults_on_old_pte(void)
++#define arch_has_hw_pte_young arch_has_hw_pte_young
++static inline bool arch_has_hw_pte_young(void)
+ {
+-	return false;
++	return true;
+ }
+
+ #ifdef CONFIG_PAGE_TABLE_CHECK
+diff --git a/include/linux/pgtable.h b/include/linux/pgtable.h
+index 014ee8f0fbaa..95f408df4695 100644
+--- a/include/linux/pgtable.h
++++ b/include/linux/pgtable.h
+@@ -260,6 +260,19 @@ static inline int pmdp_clear_flush_young(struct vm_area_struct *vma,
+ #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
+ #endif
+
++#ifndef arch_has_hw_pte_young
++/*
++ * Return whether the accessed bit is supported on the local CPU.
++ *
++ * This stub assumes accessing through an old PTE triggers a page fault.
++ * Architectures that automatically set the access bit should overwrite it.
++ */
++static inline bool arch_has_hw_pte_young(void)
++{
++	return false;
++}
++#endif
++
+ #ifndef __HAVE_ARCH_PTEP_GET_AND_CLEAR
+ static inline pte_t ptep_get_and_clear(struct mm_struct *mm,
+ 				       unsigned long address,
+diff --git a/mm/memory.c b/mm/memory.c
+index a78814413ac0..68294ce1cb06 100644
+--- a/mm/memory.c
++++ b/mm/memory.c
+@@ -125,18 +125,6 @@ int randomize_va_space __read_mostly =
+ 					2;
+ #endif
+
+-#ifndef arch_faults_on_old_pte
+-static inline bool arch_faults_on_old_pte(void)
+-{
+-	/*
+-	 * Those arches which don't have hw access flag feature need to
+-	 * implement their own helper. By default, "true" means pagefault
+-	 * will be hit on old pte.
+-	 */
+-	return true;
+-}
+-#endif
+-
+ #ifndef arch_wants_old_prefaulted_pte
+ static inline bool arch_wants_old_prefaulted_pte(void)
+ {
+@@ -2870,7 +2858,7 @@ static inline bool __wp_page_copy_user(struct page *dst, struct page *src,
+ 	 * On architectures with software "accessed" bits, we would
+ 	 * take a double page fault, so mark it accessed here.
+ 	 */
+-	if (arch_faults_on_old_pte() && !pte_young(vmf->orig_pte)) {
++	if (!arch_has_hw_pte_young() && !pte_young(vmf->orig_pte)) {
+ 		pte_t entry;
+
+ 		vmf->pte = pte_offset_map_lock(mm, vmf->pmd, addr, &vmf->ptl);
+-- 
+2.17.1
+

target/linux/generic/backport-6.0/101-mm-x86-add-CONFIG_ARCH_HAS_NONLEAF_PMD_YOUNG.patch

@@ -0,0 +1,145 @@
+From 0c0016e6f53b52166fe4da61c81fa6b27f4650cd Mon Sep 17 00:00:00 2001
+From: Yu Zhao <[email protected]>
+Date: Sat, 26 Sep 2020 21:17:18 -0600
+Subject: [PATCH 02/14] mm: x86: add CONFIG_ARCH_HAS_NONLEAF_PMD_YOUNG
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Some architectures support the accessed bit in non-leaf PMD entries,
+e.g., x86 sets the accessed bit in a non-leaf PMD entry when using it
+as part of linear address translation [1]. Page table walkers that
+clear the accessed bit may use this capability to reduce their search
+space.
+
+Note that:
+1. Although an inline function is preferable, this capability is added
+   as a configuration option for consistency with the existing macros.
+2. Due to the little interest in other varieties, this capability was
+   only tested on Intel and AMD CPUs.
+
+Thanks to the following developers for their efforts [2][3].
+  Randy Dunlap <[email protected]>
+  Stephen Rothwell <[email protected]>
+
+[1]: Intel 64 and IA-32 Architectures Software Developer's Manual
+     Volume 3 (June 2021), section 4.8
+[2] https://lore.kernel.org/r/[email protected]/
+[3] https://lore.kernel.org/r/[email protected]/
+
+Signed-off-by: Yu Zhao <[email protected]>
+Reviewed-by: Barry Song <[email protected]>
+Acked-by: Brian Geffon <[email protected]>
+Acked-by: Jan Alexander Steffens (heftig) <[email protected]>
+Acked-by: Oleksandr Natalenko <[email protected]>
+Acked-by: Steven Barrett <[email protected]>
+Acked-by: Suleiman Souhlal <[email protected]>
+Tested-by: Daniel Byrne <[email protected]>
+Tested-by: Donald Carr <[email protected]>
+Tested-by: Holger Hoffstätte <[email protected]>
+Tested-by: Konstantin Kharlamov <[email protected]>
+Tested-by: Shuang Zhai <[email protected]>
+Tested-by: Sofia Trinh <[email protected]>
+Tested-by: Vaibhav Jain <[email protected]>
+Change-Id: I1a17be3ae926f721f7b17ea1539e5c39e8c4f9a8
+---
+ arch/Kconfig                   | 8 ++++++++
+ arch/x86/Kconfig               | 1 +
+ arch/x86/include/asm/pgtable.h | 3 ++-
+ arch/x86/mm/pgtable.c          | 5 ++++-
+ include/linux/pgtable.h        | 4 ++--
+ 5 files changed, 17 insertions(+), 4 deletions(-)
+
+diff --git a/arch/Kconfig b/arch/Kconfig
+index 8b311e400ec1..bf19a84fffa2 100644
+--- a/arch/Kconfig
++++ b/arch/Kconfig
+@@ -1418,6 +1418,14 @@ config DYNAMIC_SIGFRAME
+ config HAVE_ARCH_NODE_DEV_GROUP
+ 	bool
+
++config ARCH_HAS_NONLEAF_PMD_YOUNG
++	bool
++	help
++	  Architectures that select this option are capable of setting the
++	  accessed bit in non-leaf PMD entries when using them as part of linear
++	  address translations. Page table walkers that clear the accessed bit
++	  may use this capability to reduce their search space.
++
+ source "kernel/gcov/Kconfig"
+
+ source "scripts/gcc-plugins/Kconfig"
+diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
+index f9920f1341c8..674d694a665e 100644
+--- a/arch/x86/Kconfig
++++ b/arch/x86/Kconfig
+@@ -85,6 +85,7 @@ config X86
+ 	select ARCH_HAS_PMEM_API		if X86_64
+ 	select ARCH_HAS_PTE_DEVMAP		if X86_64
+ 	select ARCH_HAS_PTE_SPECIAL
++	select ARCH_HAS_NONLEAF_PMD_YOUNG	if PGTABLE_LEVELS > 2
+ 	select ARCH_HAS_UACCESS_FLUSHCACHE	if X86_64
+ 	select ARCH_HAS_COPY_MC			if X86_64
+ 	select ARCH_HAS_SET_MEMORY
+diff --git a/arch/x86/include/asm/pgtable.h b/arch/x86/include/asm/pgtable.h
+index dc5f7d8ef68a..5059799bebe3 100644
+--- a/arch/x86/include/asm/pgtable.h
++++ b/arch/x86/include/asm/pgtable.h
+@@ -815,7 +815,8 @@ static inline unsigned long pmd_page_vaddr(pmd_t pmd)
+
+ static inline int pmd_bad(pmd_t pmd)
+ {
+-	return (pmd_flags(pmd) & ~_PAGE_USER) != _KERNPG_TABLE;
++	return (pmd_flags(pmd) & ~(_PAGE_USER | _PAGE_ACCESSED)) !=
++	       (_KERNPG_TABLE & ~_PAGE_ACCESSED);
+ }
+
+ static inline unsigned long pages_to_mb(unsigned long npg)
+diff --git a/arch/x86/mm/pgtable.c b/arch/x86/mm/pgtable.c
+index a932d7712d85..8525f2876fb4 100644
+--- a/arch/x86/mm/pgtable.c
++++ b/arch/x86/mm/pgtable.c
+@@ -550,7 +550,7 @@ int ptep_test_and_clear_young(struct vm_area_struct *vma,
+ 	return ret;
+ }
+
+-#ifdef CONFIG_TRANSPARENT_HUGEPAGE
++#if defined(CONFIG_TRANSPARENT_HUGEPAGE) || defined(CONFIG_ARCH_HAS_NONLEAF_PMD_YOUNG)
+ int pmdp_test_and_clear_young(struct vm_area_struct *vma,
+ 			      unsigned long addr, pmd_t *pmdp)
+ {
+@@ -562,6 +562,9 @@ int pmdp_test_and_clear_young(struct vm_area_struct *vma,
+
+ 	return ret;
+ }
++#endif
++
++#ifdef CONFIG_TRANSPARENT_HUGEPAGE
+ int pudp_test_and_clear_young(struct vm_area_struct *vma,
+ 			      unsigned long addr, pud_t *pudp)
+ {
+diff --git a/include/linux/pgtable.h b/include/linux/pgtable.h
+index 95f408df4695..d9095251bffd 100644
+--- a/include/linux/pgtable.h
++++ b/include/linux/pgtable.h
+@@ -213,7 +213,7 @@ static inline int ptep_test_and_clear_young(struct vm_area_struct *vma,
+ #endif
+
+ #ifndef __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG
+-#ifdef CONFIG_TRANSPARENT_HUGEPAGE
++#if defined(CONFIG_TRANSPARENT_HUGEPAGE) || defined(CONFIG_ARCH_HAS_NONLEAF_PMD_YOUNG)
+ static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma,
+ 					    unsigned long address,
+ 					    pmd_t *pmdp)
+@@ -234,7 +234,7 @@ static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma,
+ 	BUILD_BUG();
+ 	return 0;
+ }
+-#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
++#endif /* CONFIG_TRANSPARENT_HUGEPAGE || CONFIG_ARCH_HAS_NONLEAF_PMD_YOUNG */
+ #endif
+
+ #ifndef __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
+-- 
+2.17.1
+