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Detect more startup config errors on Cortex M #832

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merged 32 commits into from
Dec 11, 2023

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jefftenney
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@jefftenney jefftenney commented Oct 12, 2023

Description

Add new assert statements in xPortStartScheduler() on Cortex M to verify correct installation of the PendSV and SVCall handlers. These same assertion statements also verify VTOR is set properly for targets with a modifiable VTOR register. These are common causes of startup issues for Cortex M users.

On ARMv7-M and ARMv8-M, add explicit setting of SVCall priority to 0 (the maximum priority). Prior to this PR the port code depended on system startup code not to change the priority from its default of 0. This a rare cause of startup issues for Cortex M users. (See last link below.) For consistency, replicate this new method of setting SVCall priority to the ARMv7-M MPU ports, replacing the previous mechanism used by those ports to set SVCall priority.

Test Steps

ARMv7-M: Execute demo application with and without #define vPortSVCHandler SVC_Handler and #define xPortPendSVHandler PendSV_Handler in FreeRTOSConfig.h. Before this PR, the application works correctly with both #defines, and doesn't work correctly without either one. After this PR, the application still works correctly with both #defines, and has an assert failure without either one, as intended.

ARMv6-M: Same as above but the port doesn't use vPortSVCHandler; test with and without xPortPendSvHandler defined. XMC1000 demo cannot be used for this test.

ARMv7-M / ARMv8-M: Use demo application. First thing in main() set VTOR to the wrong value. Before this PR, xPortStartScheduler() hard faults. After this PR, an assert failure detects the issue, as intended.

Checklist:

  • I have tested my changes. No regression in existing tests.
  • I have modified and/or added unit-tests to cover the code changes in this Pull Request.

Related Issues

https://forums.freertos.org/t/prvportstartfirsttask-fails-at-svc-0/18288
https://forums.freertos.org/t/hard-fault-encountered-after-vtaskstartscheduler-is-invoked/17476
https://forums.freertos.org/t/freertos-does-not-execute-first-task-after-svc-0-call/16124
https://forums.freertos.org/t/xportstartscheduler-fails-because-basepri-is-non-zero/15509
...

By submitting this pull request, I confirm that you can use, modify, copy, and redistribute this contribution, under the terms of your choice.

@jefftenney
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jefftenney commented Oct 12, 2023

In a week or so, I plan to replicate these changes to all the other ARMv7-M targets and to the ARMv8-M targets too. I might also be able to replicate them to ARMv6-M. Then I'll remove the "draft" flag on this PR.

Meantime, please feel free to review. Better now than after the replication. 😄

Delay replication (copy_files.py) to simplify review for now.
Style issue addressed here was previously existing
portable/ARMv8M/non_secure/port.c Outdated Show resolved Hide resolved
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codecov bot commented Oct 13, 2023

Codecov Report

All modified and coverable lines are covered by tests ✅

Comparison is base (553caa1) 93.78% compared to head (53cfc6d) 93.78%.

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@@           Coverage Diff           @@
##             main     #832   +/-   ##
=======================================
  Coverage   93.78%   93.78%           
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  Files           6        6           
  Lines        3184     3184           
  Branches      885      885           
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  Partials      107      107           
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jefftenney commented Oct 13, 2023

A couple of issues with Cortex-M0 (ARMv6-M).

  1. The port (currently) functions properly without the SVCall handler being installed. However, requiring it is still a good idea for backward and forward compatibility. So I've kept it in for the M0 just like the ports that do require the SVCall handler being installed. EDIT: Nevermind - I removed it after finding some FreeRTOS demos that don't install the SVC handler on CM0.
  2. A preexisting comment in port.c indicate that we cannot rely on VTOR to find the vector table. However my reading of the reference manual indicates that isn't true, even when the device doesn't support VTOR at all. In that case the VTOR address space is RAZ/WI. And a review of the operation code for core reset indicates the core itself uses VTOR to find the vectors, even if VTOR is not implemented. Thus if VTOR is not implemented, the vector table is always at 0x00000000.
    image
TakeReset()
    VTOR = Zeros(32);
    for i = 0 to 12
        R[i] = bits(32) UNKNOWN;
    bits(32) vectortable = VTOR;
    [...]
    SP_main = MemA[vectortable,4] AND 0xFFFFFFFC<31:0>;
    SP_process = ((bits(30) UNKNOWN):’00’);
    start = MemA[vectortable+4,4]; // Load address of reset routine

I suggest we either remove the preexisting comment or revert ARMv6-M, leaving it out of this PR. Happy to do whatever the team would like. EDIT: I've updated the comment.

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Applications doing something "special" with their vectors may encounter a backward compatibility issue after this PR. For example, if they "re-vector" the FreeRTOS interrupts (which must be done very carefully), then if they try to upgrade FreeRTOS to a version that includes this PR, the new assert statements could fail. Thus I have added configCHECK_HANDLER_INSTALLATION.

The PR as of this writing defaults configCHECK_HANDLER_INSTALLATION to 1 so the new checks can be effective. However, that default setting does have the backward-compatibility issue described above. The issue would be very rare. As an example, the XMC1000 re-vectors all interrupts, so that demo will have to disable the new checks. See jefftenney/FreeRTOS@7376b2.

@jefftenney jefftenney marked this pull request as ready for review October 16, 2023 21:50
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@aggarg @urutva This PR is ready for review.

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urutva commented Oct 25, 2023

Also, ARM_CM7 port for both GCC and IAR is not updated. Can you please check?

@jefftenney jefftenney requested a review from urutva October 25, 2023 21:23
urutva
urutva previously approved these changes Oct 26, 2023
shubnil
shubnil previously approved these changes Nov 7, 2023
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aggarg commented Nov 30, 2023

I am looking at it and should be able to merge in couple of days. Thank you for your patience.

@jefftenney
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@aggarg No worries at all. If you do decide to merge this, I will raise a PR to #define configCHECK_HANDLER_INSTALLATION 0 for the XMC1000 demo. That's the only demo affected from what I can see.

That is a concept issue with this PR -- that some existing applications will be affected.

chinglee-iot and others added 4 commits December 6, 2023 16:05
Also update the only remaining MPU port RVDS/ARM_CM4_MPU.

Signed-off-by: Gaurav Aggarwal <[email protected]>
Signed-off-by: Gaurav Aggarwal <[email protected]>
@aggarg aggarg dismissed stale reviews from shubnil and urutva via eb825c9 December 9, 2023 12:56
aggarg
aggarg previously approved these changes Dec 9, 2023
Signed-off-by: Gaurav Aggarwal <[email protected]>
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Kudos, SonarCloud Quality Gate passed!    Quality Gate passed

Bug A 0 Bugs
Vulnerability A 0 Vulnerabilities
Security Hotspot A 0 Security Hotspots
Code Smell A 0 Code Smells

No Coverage information No Coverage information
0.0% 0.0% Duplication

@jefftenney
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As usual thanks Gaurav for all the work. Next time I will be sure to point out specifically when I haven't compiled with IAR. That way, first reviewers will have a better chance of resolving any build issues I missed, before it gets to later reviewers. (Actually, a few months ago I asked IAR to sponsor a license for this kind of open-source contribution, but it didn't work out.)

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aggarg commented Dec 10, 2023

No worries at all Jeff. Thank you for this change - this will really help to catch issue which are otherwise hard to debug in forums!

@chinglee-iot chinglee-iot dismissed RichardBarry’s stale review December 11, 2023 03:05

The change request is addressed in this PR. Dismiss this change request.

@aggarg aggarg merged commit 30e6b8a into FreeRTOS:main Dec 11, 2023
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@jefftenney Thanks for this great contribution!

@jefftenney jefftenney deleted the detect-startup-config-errors branch December 11, 2023 18:12
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7 participants