Fix RISC-V configMTIMECMP_BASE_ADDRESS (64-bit) stored in 32-bit int #1176
Conversation
Related to FreeRTOS#189 Update `configMTIMECMP_BASE_ADDRESS` to be stored in a 64-bit integer. * Change the type of `ullMachineTimerCompareRegisterBase` to `uint64_t` in `portable/GCC/RISC-V/port.c`. * Change the type of `ullMachineTimerCompareRegisterBase` to `uint64_t` in `portable/IAR/RISC-V/port.c`. * Update the initialization of `ullMachineTimerCompareRegisterBase` to use `configMTIMECMP_BASE_ADDRESS` in both files.
|
Hello @vishwamartur, Thank you! |
|
@vishwamartur Would you please share how you tested these changes on 32-bit and 64-bit platforms as the same code is used on both the platforms. |
|
Thank you for the feedback! I haven’t tested these changes yet, as I currently lack access to a compatible platform for both 32-bit and 64-bit verification. If you have any suggestions for alternative testing methods or an emulator that could support this setup, I’d be glad to give it a try. Thanks again! |
|
|
I tested this change using Qemu and looks good to me. On a side note, I'd suggest to use the PR template as it guides you what all information to provide when creating a PR (which includes testing). |
Related to #189
Update
configMTIMECMP_BASE_ADDRESSto be stored in a 64-bit integer.ullMachineTimerCompareRegisterBasetouint64_tinportable/GCC/RISC-V/port.c.ullMachineTimerCompareRegisterBasetouint64_tinportable/IAR/RISC-V/port.c.ullMachineTimerCompareRegisterBaseto useconfigMTIMECMP_BASE_ADDRESSin both files.