GCC: ARM_CM0: Fix L6286E error on Keil MDK

[TomasGalbickaNXP]

Keil MDK Compilation for CM0 core reports L6286E: Relocation #REL:0 in portasm.o

Description

Change the .b instruction to .bl with higher range to solve error reported by MDK descibed bellow.

Fix:
Error: L6286E: Relocation #REL:0 in portasm.o(.text.SVC_Handler) with respect to vPortSVCHandler_C. Value(0x1a04) out of range(-0x800 - 0x7fe) for (R_ARM_THM_JUMP11)

Compiler: Keil MDK ARMClang 6.22.0

https://developer.arm.com/documentation/ka002847/latest/ https://developer.arm.com/documentation/dui0496/m/Linker-Errors-and-Warnings/List-of-the-armlink-error-and-warning-messages

See the issue #1130

Test Steps

See the issue #1130

To Reproduce
git clone https://github.com/TomasGalbickaNXP/freertos-port-cm0-core-issue.git
Checkout the Example with added CM0 MPU port.
git checkout 40af92d06408450e11ca10ad17cd578760fd861a
Open MDK Project and build. It will fail with error reported above.
Checkout fix
git checkout 72a9d6246277ae32594bab69fef66c6e13af3cd1
Open MDK Project and build.
The build reports no Errors.

Checklist:

• [ x ] I have tested my changes. No regression in existing tests.
• [ ] I have modified and/or added unit-tests to cover the code changes in this Pull Request.

Related Issue

#1130

By submitting this pull request, I confirm that you can use, modify, copy, and redistribute this contribution, under the terms of your choice.

[aggarg]

Can you share the project that we can use to repro the problem?

[TomasGalbickaNXP]

Hi @aggarg Please refer to the Issue there is To Reproduce with the link to git repo with the example project. I will also update this PR.
#1130

[aggarg]

Hi @aggarg Please refer to the Issue there is To Reproduce with the link to git repo with the example project. I will also update this PR. #1130

Thank you. I will give it a try and get back.

[aggarg]

Branch and Link (bl) instruction changes the value of Link Register (LR) which needs to be preserved. There are 2 ways to solve this problem -

1. Push and pop the Link Register (LR) in the way we do for system_call_enter and system_call_exit:

   push {lr}
   bl vPortSVCHandler_C
   pop {pc}
   

   This has a drawback - the system call to start the scheduler (portSVC_START_SCHEDULER) never returns and therefore, the corresponding pop is never executed. As a result, we end up wasting 4 bytes on MSP.

2. Alternative is to use Branch and Exchange (BX) instruction which does not have the range restriction. The following patch implements this solution - use_bx.patch. I have tested this solution on a Cortex-M0+ platform and I have checked that your project builds too with this change. I suggest that we go with this solution. If you agree, would you please apply this patch in this PR.

Thanks.

[TomasGalbickaNXP]

Great! Thanks for your fix.
Yes agreed bx instruction will be better here.

I have applied your provided patch.

[urutva]

Suggested change

	" ldr r3, vPortSVCHandler_C_Address \n"
	" ldr r3, =vPortSVCHandler_C \n"

@TomasGalbickaNXP @aggarg Apologies for the nit. With this style, we can avoid the constant pool defined at the end of the function and let the linker handle the needed alignement.

[aggarg]

Thanks @urutva for pointing that out. Here is the updated patch - use_bx_updated.patch. I have tested it on M0+ for both MPU enable and disable.

@TomasGalbickaNXP please use this patch instead. Apologies for back and forth.

[sonarqubecloud]

Quality Gate passed

Issues
0 New issues
0 Accepted issues

Measures
0 Security Hotspots
0.0% Coverage on New Code
0.0% Duplication on New Code

See analysis details on SonarCloud

[TomasGalbickaNXP]

OK patch applied.

[aggarg]

Thank you for your contribution!

[TomasGalbickaNXP]

Thank you for great assistance!