Add portMEMORY_BARRIER defination for Xtensa platform

[superroc]

Add portMEMORY_BARRIER defination for Xtensa platform.

Description

The following code in xTaskResumeAll function may be over-optimized, the result is that the variable pxTCB does not change after the first loop.

pxTCB = listGET_OWNER_OF_HEAD_ENTRY( ( &xPendingReadyList ) );
listREMOVE_ITEM( &( pxTCB->xEventListItem ) );
portMEMORY_BARRIER();
listREMOVE_ITEM( &( pxTCB->xStateListItem ) );
prvAddTaskToReadyList( pxTCB );

The problem will be solved after define portMEMORY_BARRIER with a proper statement.

Test Steps

Checklist:

• I have tested my changes. No regression in existing tests.
• I have modified and/or added unit-tests to cover the code changes in this Pull Request.

Related Issue

#1114

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[sonarqubecloud]

Quality Gate passed

Issues
0 New issues
0 Accepted issues

Measures
0 Security Hotspots
0.0% Coverage on New Code
0.0% Duplication on New Code

See analysis details on SonarCloud