Update ARM_CRx_No_GIC port

[kar-rahul-aws]

Description

This PR makes the following improvements to the ARM_CRx_No_GIC port-

1. Remove inline assembly and move all the assembly code to the portASM.S file.

2. Add support for configUSE_TASK_FPU_SUPPORT -

   • When configUSE_TASK_FPU_SUPPORT is defined to 1, tasks are created without floating point context. Tasks that want to use floating point, need to call portTASK_USES_FLOATING_POINT(). This is the current behavior.
   • When configUSE_TASK_FPU_SUPPORT is defined to 2, each task is created with a floating point context.

   If left undefined, configUSE_TASK_FPU_SUPPORT defaults to 1 for backward compatibility.

3. The application writer can now implement vApplicationSVCHandler to handle the SVC calls raised within the application. SVC 0 is used for the yield kernel operation and the application can use all the SVC calls other than 0.

Test Steps

Tested using register tests and standard full demo tests on the TI RM57 board.

Checklist:

• I have tested my changes. No regression in existing tests.
• [NA] I have modified and/or added unit-tests to cover the code changes in this Pull Request.

By submitting this pull request, I confirm that you can use, modify, copy, and redistribute this contribution, under the terms of your choice.

[Skptak]

I know that this is code that is already here, but this makes an assumption that the MCU being used has a memory-mapped EOI register, the ARM_CRx_MPU:FreeRTOS_IRQ_Handler removed this code, I'd recommend doing the same here.

[aggarg]

The suggestion is good but this may break existing applications that rely on this behavior. I'd keep it here for backward compatibility.