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Juan Gonzalez-Gomez edited this page Apr 1, 2024 · 4 revisions

Contents

Usage

apio verify [OPTIONS]

Description

Verify the verilog code. It is agnostic of the FPGA. It does not use the constraint file

Required package: oss-cad-suite

Options

Flag Long Flag Description
-b --board Select a specific board
--serial-port Select a specific serial port. You can check the available serial devices with the command apio system --lsserial
--ftdi-id Select a specific FTDI index. You can check the available FTDI indexes with the command apio system --lsftdi
-s --sram Perform SRAM programming. Only available for iceprog compatible boards
-f --flash Perform FLASH programming
-p --project-dir Set the target directory for the project.
-v --verbose Show the entire output of the command
--verbose-yosys Show the yosys output of the command
--verbose-pnr Show the pnr output of the command
--top-module str Set the top level module (w/o .v ending) for build

Note

All available boards, FPGAs, sizes, types and packs are showed in apio boards

Examples

1. Upload the ledon example

apio upload


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