Added an apio test command.

[zapta]

This PR adds the apio test command to simulate all the testbenches.

Notes in an arbitrary order:

• I didn't add the user documentation for that command so please add.
• The --testbench flag allows to test just a single testbench.
• Failed assertions in a testbench are expected to exist with an error. I am using $fatal.
• The command fails on the first failed testbench rather than continues testing the rest of the testbenches.
• The PR also changes the apio sim command, having it defining the macro INTERACTIVE_SIM. This allows test benches to ignore assertion failures and continue to generating the waves for diagnostics. I am using this assertion:

`define EXPECT(signal, value) \
    if (signal !== value) begin \
        $display("ASSERTION FAILED in %m: signal != value"); \
        `ifndef INTERACTIVE_SIM \
             $fatal; \
        `endif \
    end

EDIT: I am not familiar with verilog assertions. If there are more comment way to assert and to control assertions, please let me know and I will change the INTERACTIVE_SIM mechanism to something else in a followup PR.

[Obijuan]

Thanks! You are on fire! 🔥🔥😃

[zapta]

I like apio. It makes everything simple, ike platformio. I develop my verilog project using the apio dev branch.

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On Thu, Feb 22, 2024 at 11:34 PM Juan Gonzalez-Gomez < ***@***.***> wrote: Thanks! You are on fire! 🔥🔥😃 — Reply to this email directly, view it on GitHub <#352 (comment)>, or unsubscribe <https://github.com/notifications/unsubscribe-auth/AAQVMQL6XDJGQJINHXR3FNLYVBBA5AVCNFSM6AAAAABDWB3V3KVHI2DSMVQWIX3LMV43OSLTON2WKQ3PNVWWK3TUHMYTSNRQHA2TIMBRGM> . You are receiving this because you authored the thread.Message ID: ***@***.***>