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Merge pull request #491 from zapta/develop
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Pointing the dev apio dev examples package to VERSION_DEV
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cavearr authored Dec 11, 2024
2 parents 750a49b + 58db761 commit bb41592
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Showing 2 changed files with 24 additions and 4 deletions.
2 changes: 1 addition & 1 deletion apio/resources/distribution.json
Original file line number Diff line number Diff line change
Expand Up @@ -4,7 +4,7 @@
"drivers": ">=1.1.0",
"examples": ">=0.0.7",
"graphviz": ">=12.1.2",
"oss-cad-suite": ">=0.2.0"
"oss-cad-suite": ">=0.2.1"
},
"pip_packages": {
"blackiceprog": ">=2.0.0,<3.0.0",
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26 changes: 23 additions & 3 deletions apio/resources/packages.json
Original file line number Diff line number Diff line change
Expand Up @@ -12,7 +12,7 @@
"extension": "zip",
"url_version": "https://github.com/FPGAwars/apio-examples/raw/master/VERSION"
},
"description": "Verilog examples",
"description": "Apio's project examples",
"env": {}
},
"oss-cad-suite": {
Expand All @@ -28,7 +28,7 @@
"extension": "tar.gz",
"url_version": "https://github.com/FPGAwars/tools-oss-cad-suite/raw/main/VERSION_DEV"
},
"description": "YosysHQ/oss-cad-suite",
"description": "YosysHQ's oss-cad-suite",
"env": {
"path": [
"%p/bin",
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]
}
},
"verible": {
"repository": {
"name": "tools-verible",
"organization": "FPGAwars"
},
"release": {
"tag_name": "v%V",
"compressed_name": "tools-verible-%P-%V",
"uncompressed_name": "",
"folder_name": "tools-verible",
"extension": "tar.gz",
"url_version": "https://github.com/FPGAwars/tools-verible/raw/main/VERSION_DEV"
},
"description": "Chips Aliance's Verible toolset",
"env": {
"path": [
"%p/bin"
]
}
},
"drivers": {
"repository": {
"name": "tools-drivers",
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]
}
}
}
}

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