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Merge pull request #3313 from alyssarosenzweig/opt/andn-mask
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rm andn masking
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alyssarosenzweig authored Dec 6, 2023
2 parents 26c9d5d + 924cfb5 commit 0fe5e3d
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Showing 3 changed files with 6 additions and 10 deletions.
4 changes: 2 additions & 2 deletions FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -2084,8 +2084,8 @@ void OpDispatchBuilder::ROLImmediateOp(OpcodeArgs) {
}

void OpDispatchBuilder::ANDNBMIOp(OpcodeArgs) {
auto* Src1 = LoadSource(GPRClass, Op, Op->Src[0], Op->Flags);
auto* Src2 = LoadSource(GPRClass, Op, Op->Src[1], Op->Flags);
auto* Src1 = LoadSource(GPRClass, Op, Op->Src[0], Op->Flags, {.AllowUpperGarbage = true});
auto* Src2 = LoadSource(GPRClass, Op, Op->Src[1], Op->Flags, {.AllowUpperGarbage = true});

auto Dest = _Andn(OpSizeFromSrc(Op), Src2, Src1);

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6 changes: 2 additions & 4 deletions unittests/InstructionCountCI/FlagM/VEX_map2.json
Original file line number Diff line number Diff line change
Expand Up @@ -418,14 +418,12 @@
]
},
"andn eax, ebx, ecx": {
"ExpectedInstructionCount": 5,
"ExpectedInstructionCount": 3,
"Comment": [
"Map 2 0b00 0xf2 32-bit"
],
"ExpectedArm64ASM": [
"mov w20, w7",
"mov w21, w5",
"bic w4, w21, w20",
"bic w4, w5, w7",
"mov x26, x4",
"tst w4, w4"
]
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6 changes: 2 additions & 4 deletions unittests/InstructionCountCI/VEX_map2.json
Original file line number Diff line number Diff line change
Expand Up @@ -3229,14 +3229,12 @@
]
},
"andn eax, ebx, ecx": {
"ExpectedInstructionCount": 5,
"ExpectedInstructionCount": 3,
"Comment": [
"Map 2 0b00 0xf2 32-bit"
],
"ExpectedArm64ASM": [
"mov w20, w7",
"mov w21, w5",
"bic w4, w21, w20",
"bic w4, w5, w7",
"mov x26, x4",
"tst w4, w4"
]
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