Add support for EVEX-encoded vaes and vpclmulqdq (#7145)

Four of the VAES opcodes take EVEX prefixes, as does vpclmulqdq, for a total of five decode table changes. - vaesdec - vaesdeclast - vaesenc - vaesenclast - vpclmulqdq These instructions do *not* take opmasks so there are no new macros, only tests.
DynamoRIO · Dec 18, 2024 · 9481855 · 9481855
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commit 9481855
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diff --git a/core/ir/x86/decode_table.c b/core/ir/x86/decode_table.c
@@ -6159,20 +6159,20 @@ const instr_info_t e_vex_extensions[][3] = {
     {INVALID, 0x6638db18, catUncategorized, "(bad)", xx, xx, xx, xx, xx, no, x, NA},
   }, { /* e_vex ext 32 */
     {OP_aesenc,  0x6638dc18, catSIMD, "aesenc",  Vdq, xx, Wdq,Vdq, xx, mrm|reqp, x, END_LIST},
-    {OP_vaesenc, 0x6638dc18, catSIMD, "vaesenc",  Vx, xx, Hx,Wx, xx, mrm|vex|reqp, x, END_LIST},
-    {INVALID, 0x6638dc18, catUncategorized, "(bad)", xx, xx, xx, xx, xx, no, x, NA},
+    {OP_vaesenc, 0x6638dc18, catSIMD, "vaesenc",  Vx, xx, Hx,Wx, xx, mrm|vex|reqp, x, tvex[32][2]},
+    {OP_vaesenc, 0x6638dc18, catSIMD, "vaesenc",  Ve, xx, He,We, xx, mrm|evex|reqp|ttfvm, x, END_LIST},
   }, { /* e_vex ext 33 */
     {OP_aesenclast,  0x6638dd18, catSIMD, "aesenclast",Vdq,xx,Wdq,Vdq,xx, mrm|reqp, x, END_LIST},
-    {OP_vaesenclast, 0x6638dd18, catSIMD, "vaesenclast",Vx,xx,Hx,Wx,xx, mrm|vex|reqp, x, END_LIST},
-    {INVALID, 0x6638dd18, catUncategorized, "(bad)", xx, xx, xx, xx, xx, no, x, NA},
+    {OP_vaesenclast, 0x6638dd18, catSIMD, "vaesenclast",Vx,xx,Hx,Wx,xx, mrm|vex|reqp, x, tvex[33][2]},
+    {OP_vaesenclast, 0x6638dd18, catSIMD, "vaesenclast",Ve,xx,He,We,xx, mrm|evex|reqp|ttfvm, x, END_LIST},
   }, { /* e_vex ext 34 */
     {OP_aesdec,  0x6638de18, catSIMD, "aesdec",  Vdq, xx, Wdq,Vdq, xx, mrm|reqp, x, END_LIST},
-    {OP_vaesdec, 0x6638de18, catSIMD, "vaesdec",  Vx, xx, Hx,Wx, xx, mrm|vex|reqp, x, END_LIST},
-    {INVALID, 0x6638de18, catUncategorized, "(bad)", xx, xx, xx, xx, xx, no, x, NA},
+    {OP_vaesdec, 0x6638de18, catSIMD, "vaesdec",  Vx, xx, Hx,Wx, xx, mrm|vex|reqp, x, tvex[34][2]},
+    {OP_vaesdec, 0x6638de18, catSIMD, "vaesdec",  Ve, xx, He,We, xx, mrm|evex|reqp|ttfvm, x, END_LIST},
   }, { /* e_vex ext 35 */
     {OP_aesdeclast,  0x6638df18, catSIMD, "aesdeclast",Vdq,xx,Wdq,Vdq,xx, mrm|reqp, x, END_LIST},
-    {OP_vaesdeclast, 0x6638df18, catSIMD, "vaesdeclast",Vx,xx,Hx,Wx,xx, mrm|vex|reqp, x, END_LIST},
-    {INVALID, 0x6638df18, catUncategorized, "(bad)", xx, xx, xx, xx, xx, no, x, NA},
+    {OP_vaesdeclast, 0x6638df18, catSIMD, "vaesdeclast",Vx,xx,Hx,Wx,xx, mrm|vex|reqp, x, tvex[35][2]},
+    {OP_vaesdeclast, 0x6638df18, catSIMD, "vaesdeclast",Ve,xx,He,We,xx, mrm|evex|reqp|ttfvm, x, END_LIST},
   }, { /* e_vex ext 36 */
     {OP_pextrb,   0x663a1418, catSIMD, "pextrb", Rd_Mb, xx, Vb_dq, Ib, xx, mrm|reqp, x, END_LIST},
     {OP_vpextrb,  0x663a1418, catSIMD, "vpextrb", Rd_Mb, xx, Vb_dq, Ib, xx, mrm|vex|reqp, x, tvex[36][2]},
@@ -6260,8 +6260,8 @@ const instr_info_t e_vex_extensions[][3] = {
     {INVALID, 0x663a6318, catUncategorized, "(bad)", xx, xx, xx, xx, xx, no, x, NA},
   }, { /* e_vex ext 57 */
     {OP_pclmulqdq, 0x663a4418, catSIMD, "pclmulqdq", Vdq, xx, Wdq, Ib, Vdq, mrm|reqp, x, END_LIST},
-    {OP_vpclmulqdq,0x663a4418, catSIMD, "vpclmulqdq", Vx, xx, Hx, Wx, Ib, mrm|vex|reqp, x, END_LIST},
-    {INVALID, 0x663a4418, catUncategorized, "(bad)", xx, xx, xx, xx, xx, no, x, NA},
+    {OP_vpclmulqdq,0x663a4418, catSIMD, "vpclmulqdq", Vx, xx, Hx, Wx, Ib, mrm|vex|reqp, x, tvex[57][2]},
+    {OP_vpclmulqdq,0x663a4418, catSIMD, "vpclmulqdq", Ve, xx, He, We, Ib, mrm|evex|reqp|ttfvm, x, END_LIST},
   }, { /* e_vex ext 58 */
     {OP_aeskeygenassist, 0x663adf18, catSIMD, "aeskeygenassist",Vdq,xx,Wdq,Ib,xx,mrm|reqp,x,END_LIST},
     {OP_vaeskeygenassist,0x663adf18, catSIMD, "vaeskeygenassist",Vdq,xx,Wdq,Ib,xx,mrm|vex|reqp,x,END_LIST},

diff --git a/suite/tests/api/ir_x86_3args_avx512_evex.h b/suite/tests/api/ir_x86_3args_avx512_evex.h
@@ -215,3 +215,67 @@ OPCODE(vpsadbw_zhizhizhi, vpsadbw, vpsadbw, X64_ONLY, REGARG(ZMM16), REGARG(ZMM1
        REGARG(ZMM31))
 OPCODE(vpsadbw_zhizhild, vpsadbw, vpsadbw, X64_ONLY, REGARG(ZMM16), REGARG(ZMM31),
        MEMARG(OPSZ_64))
+OPCODE(vaesenc_evex_xhixhixhi, vaesenc, vaesenc, X64_ONLY, REGARG(XMM16), REGARG(XMM17),
+       REGARG(XMM18))
+OPCODE(vaesenc_evex_xhixhild, vaesenc, vaesenc, X64_ONLY, REGARG(XMM16), REGARG(XMM17),
+       MEMARG(OPSZ_16))
+OPCODE(vaesenc_evex_yhiyhiyhi, vaesenc, vaesenc, X64_ONLY, REGARG(YMM16), REGARG(YMM17),
+       REGARG(YMM18))
+OPCODE(vaesenc_evex_yhiyhild, vaesenc, vaesenc, X64_ONLY, REGARG(YMM16), REGARG(YMM17),
+       MEMARG(OPSZ_32))
+OPCODE(vaesenc_evex_zlozlozlo, vaesenc, vaesenc, 0, REGARG(ZMM0), REGARG(ZMM1),
+       REGARG(ZMM2))
+OPCODE(vaesenc_evex_zlozlold, vaesenc, vaesenc, 0, REGARG(ZMM0), REGARG(ZMM1),
+       MEMARG(OPSZ_64))
+OPCODE(vaesenc_evex_zhizhizhi, vaesenc, vaesenc, X64_ONLY, REGARG(ZMM16), REGARG(ZMM17),
+       REGARG(ZMM18))
+OPCODE(vaesenc_evex_zhizhild, vaesenc, vaesenc, X64_ONLY, REGARG(ZMM16), REGARG(ZMM17),
+       MEMARG(OPSZ_64))
+OPCODE(vaesenclast_evex_xhixhixhi, vaesenclast, vaesenclast, X64_ONLY, REGARG(XMM16),
+       REGARG(XMM17), REGARG(XMM18))
+OPCODE(vaesenclast_evex_xhixhild, vaesenclast, vaesenclast, X64_ONLY, REGARG(XMM16),
+       REGARG(XMM17), MEMARG(OPSZ_16))
+OPCODE(vaesenclast_evex_yhiyhiyhi, vaesenclast, vaesenclast, X64_ONLY, REGARG(YMM16),
+       REGARG(YMM17), REGARG(YMM15))
+OPCODE(vaesenclast_evex_yhiyhild, vaesenclast, vaesenclast, X64_ONLY, REGARG(YMM16),
+       REGARG(YMM17), MEMARG(OPSZ_32))
+OPCODE(vaesenclast_evex_zlozlozlo, vaesenclast, vaesenclast, 0, REGARG(ZMM0),
+       REGARG(ZMM1), REGARG(ZMM2))
+OPCODE(vaesenclast_evex_zlozlold, vaesenclast, vaesenclast, 0, REGARG(ZMM0), REGARG(ZMM1),
+       MEMARG(OPSZ_64))
+OPCODE(vaesenclast_evex_zhizhizhi, vaesenclast, vaesenclast, X64_ONLY, REGARG(ZMM16),
+       REGARG(ZMM17), REGARG(ZMM15))
+OPCODE(vaesenclast_evex_zhizhild, vaesenclast, vaesenclast, X64_ONLY, REGARG(ZMM16),
+       REGARG(ZMM17), MEMARG(OPSZ_64))
+OPCODE(vaesdec_evex_xhixhixlo, vaesdec, vaesdec, X64_ONLY, REGARG(XMM16), REGARG(XMM17),
+       REGARG(XMM0))
+OPCODE(vaesdec_evex_xhixhild, vaesdec, vaesdec, X64_ONLY, REGARG(XMM16), REGARG(XMM17),
+       MEMARG(OPSZ_16))
+OPCODE(vaesdec_evex_yhiyhiylo, vaesdec, vaesdec, X64_ONLY, REGARG(YMM16), REGARG(YMM17),
+       REGARG(YMM0))
+OPCODE(vaesdec_evex_yhiyhild, vaesdec, vaesdec, X64_ONLY, REGARG(YMM16), REGARG(YMM17),
+       MEMARG(OPSZ_32))
+OPCODE(vaesdec_evex_zlozlozlo, vaesdec, vaesdec, 0, REGARG(ZMM0), REGARG(ZMM1),
+       REGARG(ZMM2))
+OPCODE(vaesdec_evex_zlozlold, vaesdec, vaesdec, 0, REGARG(ZMM0), REGARG(ZMM1),
+       MEMARG(OPSZ_64))
+OPCODE(vaesdec_evex_zhizhizlo, vaesdec, vaesdec, X64_ONLY, REGARG(ZMM16), REGARG(ZMM17),
+       REGARG(ZMM15))
+OPCODE(vaesdec_evex_zhizhild, vaesdec, vaesdec, X64_ONLY, REGARG(ZMM8), REGARG(ZMM9),
+       MEMARG(OPSZ_64))
+OPCODE(vaesdeclast_evex_xhixhixhi, vaesdeclast, vaesdeclast, X64_ONLY, REGARG(XMM16),
+       REGARG(XMM17), REGARG(XMM18))
+OPCODE(vaesdeclast_evex_xhixhild, vaesdeclast, vaesdeclast, X64_ONLY, REGARG(XMM16),
+       REGARG(XMM17), MEMARG(OPSZ_16))
+OPCODE(vaesdeclast_evex_yhiyhiyhi, vaesdeclast, vaesdeclast, X64_ONLY, REGARG(YMM16),
+       REGARG(YMM17), REGARG(YMM31))
+OPCODE(vaesdeclast_evex_yhiyhild, vaesdeclast, vaesdeclast, X64_ONLY, REGARG(YMM16),
+       REGARG(YMM17), MEMARG(OPSZ_32))
+OPCODE(vaesdeclast_evex_zlozlozlo, vaesdeclast, vaesdeclast, 0, REGARG(ZMM0),
+       REGARG(ZMM1), REGARG(ZMM2))
+OPCODE(vaesdeclast_evex_zlozlold, vaesdeclast, vaesdeclast, 0, REGARG(ZMM0), REGARG(ZMM1),
+       MEMARG(OPSZ_64))
+OPCODE(vaesdeclast_evex_zhizhizhi, vaesdeclast, vaesdeclast, X64_ONLY, REGARG(ZMM16),
+       REGARG(ZMM17), REGARG(ZMM31))
+OPCODE(vaesdeclast_evex_zhizhild, vaesdeclast, vaesdeclast, X64_ONLY, REGARG(ZMM16),
+       REGARG(ZMM17), MEMARG(OPSZ_64))
diff --git a/suite/tests/api/ir_x86_4args_avx512_evex.h b/suite/tests/api/ir_x86_4args_avx512_evex.h
@@ -67,3 +67,17 @@ OPCODE(vpinsrq_xhixhir, vpinsrq, vpinsrq, X64_ONLY, REGARG(XMM16),
        REGARG_PARTIAL(XMM31, OPSZ_8), REGARG(RAX), IMMARG(OPSZ_1))
 OPCODE(vpinsrq_xhixhim, vpinsrq, vpinsrq, X64_ONLY, REGARG(XMM16),
        REGARG_PARTIAL(XMM31, OPSZ_8), MEMARG(OPSZ_8), IMMARG(OPSZ_1))
+OPCODE(vpclmulqdq_evex_xhixhixhi, vpclmulqdq, vpclmulqdq, X64_ONLY, REGARG(XMM16),
+       REGARG(XMM17), REGARG(XMM18), IMMARG(OPSZ_1))
+OPCODE(vpclmulqdq_evex_xhixhild, vpclmulqdq, vpclmulqdq, X64_ONLY, REGARG(XMM16),
+       REGARG(XMM17), MEMARG(OPSZ_16), IMMARG(OPSZ_1))
+OPCODE(vpclmulqdq_evex_yhiyhiyhi, vpclmulqdq, vpclmulqdq, X64_ONLY, REGARG(YMM16),
+       REGARG(YMM17), REGARG(YMM18), IMMARG(OPSZ_1))
+OPCODE(vpclmulqdq_evex_yhiyhild, vpclmulqdq, vpclmulqdq, X64_ONLY, REGARG(YMM16),
+       REGARG(YMM17), MEMARG(OPSZ_32), IMMARG(OPSZ_1))
+OPCODE(vpclmulqdq_zlozlozlo, vpclmulqdq, vpclmulqdq, 0, REGARG(ZMM0), REGARG(ZMM1),
+       REGARG(ZMM2), IMMARG(OPSZ_1))
+OPCODE(vpclmulqdq_zlozlold, vpclmulqdq, vpclmulqdq, 0, REGARG(ZMM0), REGARG(ZMM1),
+       MEMARG(OPSZ_64), IMMARG(OPSZ_1))
+OPCODE(vpclmulqdq_zhizhizhi, vpclmulqdq, vpclmulqdq, X64_ONLY, REGARG(ZMM16),
+       REGARG(ZMM17), REGARG(ZMM18), IMMARG(OPSZ_1))