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Support RISC-V unaligned-scalar-mem target feature
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This adds `unaligned-scalar-mem` as an allowed RISC-V target feature.
Some RISC-V cores support unaligned access to memory without trapping.
On such cores, the compiler could significantly improve code-size and
performance when using functions like core::ptr::read_unaligned<u32>
by emitting a single load or store instruction with an unaligned
address, rather than a long sequence of byte load/store/bitmanip
instructions.

Enabling the `unaligned-scalar-mem` target feature allows LLVM to do
this optimization.

Fixes rust-lang#110883
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korran committed Apr 27, 2023
1 parent adaac6b commit 08f7e32
Showing 1 changed file with 1 addition and 0 deletions.
1 change: 1 addition & 0 deletions compiler/rustc_codegen_ssa/src/target_features.rs
Original file line number Diff line number Diff line change
Expand Up @@ -252,6 +252,7 @@ const RISCV_ALLOWED_FEATURES: &[(&str, Option<Symbol>)] = &[
("f", Some(sym::riscv_target_feature)),
("m", Some(sym::riscv_target_feature)),
("relax", Some(sym::riscv_target_feature)),
("unaligned-scalar-mem", Some(sym::riscv_target_feature)),
("v", Some(sym::riscv_target_feature)),
("zba", Some(sym::riscv_target_feature)),
("zbb", Some(sym::riscv_target_feature)),
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