Add NUC126 support

ext/numicroM0.cfg

@@ -53,6 +53,7 @@ $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE
 # flash size will be probed
 set _FLASHNAME $_CHIPNAME.flash_aprom
 flash bank $_FLASHNAME numicro 0x00000000 0 0 0 $_TARGETNAME
+# TODO this is configurable in NUC126 family
 set _FLASHNAME $_CHIPNAME.flash_data
 flash bank $_FLASHNAME numicro 0x0001F000 0 0 0 $_TARGETNAME
 set _FLASHNAME $_CHIPNAME.flash_ldrom
@@ -78,4 +79,4 @@ proc exitDebugging {} {
    shutdown
 }
 
-$_TARGETNAME configure -event gdb-detach { exitDebugging }
+$_TARGETNAME configure -event gdb-detach { exitDebugging }

lgtm.yml

@@ -20,5 +20,5 @@ extraction:
       build_command:
       - export PATH=${LGTM_WORKSPACE}/gcc-arm/bin:${PATH}
       - export CH_PATH=${LGTM_WORKSPACE}/ChibiOS CHC_PATH=${LGTM_SRC}
-      - ./tools/chbuild.sh testhal/{STM32,NRF51,NRF52,KINETIS}
-      - ./tools/chbuild.sh demos/{STM32,NRF51,NRF52,KINETIS}
+      - ./tools/chbuild.sh testhal/{STM32,NRF51,NRF52,KINETIS,NUMICRO}
+      - ./tools/chbuild.sh demos/{STM32,NRF51,NRF52,KINETIS,NUMICRO}

os/common/ext/CMSIS/Nuvoton/NUMICRO/system_NUC126.h

@@ -0,0 +1,109 @@
+/**************************************************************************//**
+ * @file     system_NUC126.h
+ * @version  V3.00
+ * $Revision: 5 $
+ * $Date: 16/10/25 4:25p $
+ * @brief    NUC126 Series System Setting Header File
+ *
+ * @note
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Copyright (C) 2016 Nuvoton Technology Corp. All rights reserved.
+ *
+ ******************************************************************************/
+#ifndef __SYSTEM_NUC126_H__
+#define __SYSTEM_NUC126_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*---------------------------------------------------------------------------------------------------------*/
+/* Macro Definition                                                                                        */
+/*---------------------------------------------------------------------------------------------------------*/
+#ifndef DEBUG_PORT
+# define DEBUG_PORT      UART0       /*!< Select Debug Port which is used for retarget.c to output debug message to UART */
+#endif
+
+/**
+ *
+ * @details    This is used to enable PLL to speed up booting at startup. Remove it will cause system using
+ *             default clock source (External crystal or internal 22.1184MHz IRC).
+ *             Enable this option will cause system booting in 72MHz(By XTAL) or 71.8848MHz(By IRC22M) according to
+ *             user configuration setting in CONFIG0
+ *
+ */
+//#define INIT_SYSCLK_AT_BOOTING
+
+/*----------------------------------------------------------------------------
+  Define SYSCLK
+ *----------------------------------------------------------------------------*/
+#define __HXT       (12000000UL)    /*!< External Crystal Clock Frequency     */
+#define __LIRC      (10000UL)       /*!< Internal 10K RC Oscillator Frequency */
+#define __HIRC      (22118400UL)    /*!< Internal 22M RC Oscillator Frequency */
+#define __LXT       (32768UL)       /*!< External Crystal Clock Frequency 32.768KHz */
+#define __HSI       (71884800UL)    /*!< PLL default output is 71.8848MHz from HIRC */
+#define __HIRC48    (48000000UL)    /*!< Internal high speed RC oscillator 48 MHz */
+
+extern uint32_t SystemCoreClock;    /*!< System Clock Frequency (Core Clock)  */
+extern uint32_t CyclesPerUs;        /*!< Cycles per micro second              */
+extern uint32_t PllClock;           /*!< PLL Output Clock Frequency           */
+
+// TODO sane configuration
+#if !defined(USE_ASSERT) || defined(__DOXYGEN__)
+#define USE_ASSERT      0
+#endif
+
+#if USE_ASSERT || defined(__DOXYGEN__)
+/**
+ * @brief      Assert Function
+ *
+ * @param[in]  expr  Expression to be evaluated
+ *
+ * @return     None
+ *
+ * @details    If the expression is false, an error message will be printed out
+ *             from debug port (UART0 or UART1).
+ */
+#define ASSERT_PARAM(expr)  { if (!(expr)) { AssertError((uint8_t*)__FILE__, __LINE__); } }
+
+void AssertError(uint8_t* file, uint32_t line);
+#else
+#define ASSERT_PARAM(expr)
+#endif
+
+#define assert_param(expr)  ASSERT_PARAM(expr)
+
+
+/**
+ * @brief    System Initialization
+ *
+ * @param    None
+ *
+ * @return   None
+ *
+ * @details  The necessary initialization of system.
+ */
+extern void SystemInit(void);
+
+
+/**
+ * @brief    Update the Variable SystemCoreClock
+ *
+ * @param    None
+ *
+ * @return   None
+ *
+ * @details  This function is used to update the variable SystemCoreClock
+ *           and must be called whenever the core clock is changed.
+ */
+extern void SystemCoreClockUpdate(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+
+/* Copyright (C) 2014 Nuvoton Technology Corp. All rights reserved. */
+

os/common/startup/ARMCMx/compilers/GCC/ld/NUC126xE4xx.ld

@@ -0,0 +1,102 @@
+/*
+    Copyright (C) 2020 Alex Lewontin
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+
+        http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+*/
+
+/*
+ * NUC126xE4xx memory setup.
+ * 128k ROM, 20k ram
+ */
+MEMORY
+{
+    flash0 (rx) : org = 0x00000000, len = 0x20000       /* APROM */
+    flash1 (rx) : org = 0x00000000, len = 0             /* Data flash placeholder */
+    flash2 (rx) : org = 0x00100000, len = 0x1000        /* LDROM */
+    flash3 (rx) : org = 0x00300000, len = 4             /* Config0 */
+    flash4 (rx) : org = 0x00300004, len = 4             /* Config1 */
+    flash5 (rx) : org = 0x00000000, len = 0
+    flash6 (rx) : org = 0x00000000, len = 0
+    flash7 (rx) : org = 0x00000000, len = 0
+    ram0   (wx) : org = 0x20000000, len = 0x5000
+    ram1   (wx) : org = 0x00000000, len = 0
+    ram2   (wx) : org = 0x00000000, len = 0
+    ram3   (wx) : org = 0x00000000, len = 0
+    ram4   (wx) : org = 0x00000000, len = 0
+    ram5   (wx) : org = 0x00000000, len = 0
+    ram6   (wx) : org = 0x00000000, len = 0
+    ram7   (wx) : org = 0x00000000, len = 0
+}
+
+REGION_ALIAS("CONFIG0", flash3);
+REGION_ALIAS("CONFIG1", flash4);
+
+SECTIONS
+{
+    .nuc126_config0 : ALIGN(4)
+    {
+        KEEP(*(.nuc126_config0))
+    } > CONFIG0
+
+    .nuc126_config1 : ALIGN(4)
+    {
+        KEEP(*(.nuc126_config1))
+    } > CONFIG1
+}
+
+/* For each data/text section two region are defined, a virtual region
+   and a load region (_LMA suffix).*/
+
+/* Flash region to be used for exception vectors.*/
+REGION_ALIAS("VECTORS_FLASH", flash0);
+REGION_ALIAS("VECTORS_FLASH_LMA", flash0);
+
+/* Flash region to be used for constructors and destructors.*/
+REGION_ALIAS("XTORS_FLASH", flash0);
+REGION_ALIAS("XTORS_FLASH_LMA", flash0);
+
+/* Flash region to be used for code text.*/
+REGION_ALIAS("TEXT_FLASH", flash0);
+REGION_ALIAS("TEXT_FLASH_LMA", flash0);
+
+/* Flash region to be used for read only data.*/
+REGION_ALIAS("RODATA_FLASH", flash0);
+REGION_ALIAS("RODATA_FLASH_LMA", flash0);
+
+/* Flash region to be used for various.*/
+REGION_ALIAS("VARIOUS_FLASH", flash0);
+REGION_ALIAS("VARIOUS_FLASH_LMA", flash0);
+
+/* Flash region to be used for RAM(n) initialization data.*/
+REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0);
+
+/* RAM region to be used for Main stack. This stack accommodates the processing
+   of all exceptions and interrupts.*/
+REGION_ALIAS("MAIN_STACK_RAM", ram0);
+
+/* RAM region to be used for the process stack. This is the stack used by
+   the main() function.*/
+REGION_ALIAS("PROCESS_STACK_RAM", ram0);
+
+/* RAM region to be used for data segment.*/
+REGION_ALIAS("DATA_RAM", ram0);
+REGION_ALIAS("DATA_RAM_LMA", flash0);
+
+/* RAM region to be used for BSS segment.*/
+REGION_ALIAS("BSS_RAM", ram0);
+
+/* RAM region to be used for the default heap.*/
+REGION_ALIAS("HEAP_RAM", ram0);
+
+/* Generic rules inclusion.*/
+INCLUDE rules.ld

os/common/startup/ARMCMx/compilers/GCC/ld/NUC126xG4xx.ld

@@ -0,0 +1,102 @@
+/*
+    Copyright (C) 2020 Alex Lewontin
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+
+        http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+*/
+
+/*
+ * NUC126xG4xx memory setup.
+ * 256k ROM, 20k ram
+ */
+MEMORY
+{
+    flash0 (rx) : org = 0x00000000, len = 0x40000       /* APROM */
+    flash1 (rx) : org = 0x00000000, len = 0             /* Data flash placeholder */
+    flash2 (rx) : org = 0x00100000, len = 0x1000        /* LDROM */
+    flash3 (rx) : org = 0x00300000, len = 4             /* Config0 */
+    flash4 (rx) : org = 0x00300004, len = 4             /* Config1 */
+    flash5 (rx) : org = 0x00000000, len = 0
+    flash6 (rx) : org = 0x00000000, len = 0
+    flash7 (rx) : org = 0x00000000, len = 0
+    ram0   (wx) : org = 0x20000000, len = 0x5000
+    ram1   (wx) : org = 0x00000000, len = 0
+    ram2   (wx) : org = 0x00000000, len = 0
+    ram3   (wx) : org = 0x00000000, len = 0
+    ram4   (wx) : org = 0x00000000, len = 0
+    ram5   (wx) : org = 0x00000000, len = 0
+    ram6   (wx) : org = 0x00000000, len = 0
+    ram7   (wx) : org = 0x00000000, len = 0
+}
+
+REGION_ALIAS("CONFIG0", flash3);
+REGION_ALIAS("CONFIG1", flash4);
+
+SECTIONS
+{
+    .nuc126_config0 : ALIGN(4)
+    {
+        KEEP(*(.nuc126_config0))
+    } > CONFIG0
+
+    .nuc126_config1 : ALIGN(4)
+    {
+        KEEP(*(.nuc126_config1))
+    } > CONFIG1
+}
+
+/* For each data/text section two region are defined, a virtual region
+   and a load region (_LMA suffix).*/
+
+/* Flash region to be used for exception vectors.*/
+REGION_ALIAS("VECTORS_FLASH", flash0);
+REGION_ALIAS("VECTORS_FLASH_LMA", flash0);
+
+/* Flash region to be used for constructors and destructors.*/
+REGION_ALIAS("XTORS_FLASH", flash0);
+REGION_ALIAS("XTORS_FLASH_LMA", flash0);
+
+/* Flash region to be used for code text.*/
+REGION_ALIAS("TEXT_FLASH", flash0);
+REGION_ALIAS("TEXT_FLASH_LMA", flash0);
+
+/* Flash region to be used for read only data.*/
+REGION_ALIAS("RODATA_FLASH", flash0);
+REGION_ALIAS("RODATA_FLASH_LMA", flash0);
+
+/* Flash region to be used for various.*/
+REGION_ALIAS("VARIOUS_FLASH", flash0);
+REGION_ALIAS("VARIOUS_FLASH_LMA", flash0);
+
+/* Flash region to be used for RAM(n) initialization data.*/
+REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0);
+
+/* RAM region to be used for Main stack. This stack accommodates the processing
+   of all exceptions and interrupts.*/
+REGION_ALIAS("MAIN_STACK_RAM", ram0);
+
+/* RAM region to be used for the process stack. This is the stack used by
+   the main() function.*/
+REGION_ALIAS("PROCESS_STACK_RAM", ram0);
+
+/* RAM region to be used for data segment.*/
+REGION_ALIAS("DATA_RAM", ram0);
+REGION_ALIAS("DATA_RAM_LMA", flash0);
+
+/* RAM region to be used for BSS segment.*/
+REGION_ALIAS("BSS_RAM", ram0);
+
+/* RAM region to be used for the default heap.*/
+REGION_ALIAS("HEAP_RAM", ram0);
+
+/* Generic rules inclusion.*/
+INCLUDE rules.ld

os/common/startup/ARMCMx/compilers/GCC/mk/startup_NUC126.mk

@@ -0,0 +1,19 @@
+# List of the ChibiOS generic NUC126 startup and CMSIS files.
+STARTUPSRC = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt1.c
+
+STARTUPASM = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt0_v6m.S \
+             $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/vectors.S
+
+STARTUPINC = $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/devices/NUC126 \
+             $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/ld \
+             $(CHIBIOS)/os/common/ext/CMSIS/include \
+             $(CHIBIOS)/os/common/ext/ARM/CMSIS/Core/Include \
+             $(CHIBIOS_CONTRIB)/os/common/ext/CMSIS/Nuvoton/NUMICRO
+
+STARTUPLD  = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/ld
+STARTUPLD_CONTRIB  = $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/ld
+
+# Shared variables
+ALLXASMSRC += $(STARTUPASM)
+ALLCSRC    += $(STARTUPSRC)
+ALLINC     += $(STARTUPINC)