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Squashed 'utils' changes from 80d465a..dc24c5f (#760)
dc24c5f Merge pull request Xilinx#298 from sdausr/next 4a9f1ba update mem 2eaa370 Merge pull request Xilinx#297 from liyuanz/add_mem 64213c9 update 6f0000e Merge pull request Xilinx#296 from changg/fix_meta 34b2fb5 fix L1 Meta a48ad2f Merge pull request Xilinx#295 from liyuanz/next d21b82c add mem 7e4f44f change 2022.2_stable_latest to 2023.1_stable_latest Co-authored-by: sdausr <[email protected]>
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Original file line number | Diff line number | Diff line change |
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@@ -1,3 +1,3 @@ | ||
@Library('pipeline-library')_ | ||
VitisLibPipeline (branch: 'next', libname: 'xf_utils_hw', TARGETS: 'hls_csim:hls_csynth:hls_cosim:vitis_sw_emu:vitis_hw_emu:vitis_hw_build', | ||
devtest: 'RunDeploy.sh', TOOLVERSION: '2022.2_stable_latest', mail_on:'daily:PR') | ||
devtest: 'RunDeploy.sh', TOOLVERSION: '2023.1_stable_latest', mail_on:'daily:PR') |
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