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Squashed 'utils' changes from 80d465a..dc24c5f (#760)
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dc24c5f Merge pull request Xilinx#298 from sdausr/next
4a9f1ba update mem
2eaa370 Merge pull request Xilinx#297 from liyuanz/add_mem
64213c9 update
6f0000e Merge pull request Xilinx#296 from changg/fix_meta
34b2fb5 fix L1 Meta
a48ad2f Merge pull request Xilinx#295 from liyuanz/next
d21b82c add mem
7e4f44f change 2022.2_stable_latest to 2023.1_stable_latest

Co-authored-by: sdausr <[email protected]>
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2 people authored and GitHub Enterprise committed Mar 14, 2023
1 parent da35a3a commit cbf93ae
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Showing 4 changed files with 6 additions and 6 deletions.
2 changes: 1 addition & 1 deletion utils/Jenkinsfile
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@Library('pipeline-library')_
VitisLibPipeline (branch: 'next', libname: 'xf_utils_hw', TARGETS: 'hls_csim:hls_csynth:hls_cosim:vitis_sw_emu:vitis_hw_emu:vitis_hw_build',
devtest: 'RunDeploy.sh', TOOLVERSION: '2022.2_stable_latest', mail_on:'daily:PR')
devtest: 'RunDeploy.sh', TOOLVERSION: '2023.1_stable_latest', mail_on:'daily:PR')
4 changes: 2 additions & 2 deletions utils/L1/examples/multi_pu_kernel/description.json
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Expand Up @@ -38,7 +38,7 @@
"env": "",
"cmd": "",
"max_memory_MB": {
"vivado_syn": 16384,
"vivado_syn": 32768,
"hls_csim": 10240,
"hls_cosim": 16384,
"vivado_impl": 16384,
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],
"category": "canary"
}
}
}
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Expand Up @@ -38,7 +38,7 @@
"env": "",
"cmd": "",
"max_memory_MB": {
"vivado_syn": 16384,
"vivado_syn": 32768,
"hls_csim": 10240,
"hls_cosim": 16384,
"vivado_impl": 16384,
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4 changes: 2 additions & 2 deletions utils/L1/tests/stream_one_to_n/load_balance/description.json
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Expand Up @@ -38,7 +38,7 @@
"env": "",
"cmd": "",
"max_memory_MB": {
"vivado_syn": 16384,
"vivado_syn": 32768,
"hls_csim": 10240,
"hls_cosim": 16384,
"vivado_impl": 16384,
Expand All @@ -62,4 +62,4 @@
],
"category": "canary"
}
}
}

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