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Picket-fence calibration interpretation appears incorrect? #36
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Status: fixed the calibration interpretation of channel widths, etc. The caveat now being that the number of REQUESTED coarse channels to process ( == MPI world size) must match correspond to the number of coarse channels in your calibration solution. The fine channelisation interpolation is figured out on the fly, but the underlying assumption is that if you want 5 coarse channels processed, the cal. sol. file you provide ONLY has solutions for those 5 channels. The next issue that seems related is a GPU shared memory alignment. Not sure exactly what's happening there, but may need someone with more CUDA experience to take a look at some point. |
I believe I've now fixed the issue. There are strict memory allocation/access requirements for GPU shared-memory (4-byte boundaries). It just so happens that previously, our memory access patterns (with For MWAX data, there is no guarantee that |
For posterity, I changed these lines Lines 272 to 276 in 2a93cdf
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@cplee1 Has better examples of this than I do, but essentially, when dealing with picket fence data, the way the VCSBeam reports to be interpreting the calibration solutions assumes that the full 30.72 MHz bandwidth is present. It then assumes the calibration solution channel widths based on this information and thus, miscalculates. It's unclear if this is just a reporting issue or whether it really applies much-wider-than-necessary channel solutions to the data...
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