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SPV_INTEL_fp_fast_math_mode used without declaring it as an extension in the SPIR-V #429

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pjaaskel opened this issue May 8, 2023 · 12 comments
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@pjaaskel
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pjaaskel commented May 8, 2023

This is reproducible on many SPIR-Vs, a reporter told. Is it a bug in the LLVM translator?

@pvelesko pvelesko added the bug Something isn't working label May 8, 2023
@pjaaskel pjaaskel added this to the 1.0 milestone May 11, 2023
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@linehill linehill removed this from the 1.0 milestone Jun 9, 2023
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linehill commented Jun 9, 2023

Dropped from Milestone 1.0: resolution depends on external issue.

@pjaaskel
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This fix is in upstream now.

@karolherbst
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This is still an issue using the recommended LLVM fork via ./scripts/configure_llvm.sh

@karolherbst
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But this issue also opens up the questions of how one can reliably use SPV_INTEL_fp_fast_math_mode as there is no CL extension adding this SPIRV extension, so nothing can rely on it being supported in the first place.

@pjaaskel pjaaskel reopened this Apr 19, 2024
@linehill
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This is still an issue using the recommended LLVM fork via ./scripts/configure_llvm.sh

On what LLVM version this happens? Could you send us / point us to the HIP source that produces the Intel fast math code?

@karolherbst
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This is still an issue using the recommended LLVM fork via ./scripts/configure_llvm.sh

On what LLVM version this happens? Could you send us / point us to the HIP source that produces the Intel fast math code?

mhh, seems to be on 6009708b4367171ccdbf4b5905cb6a803753fe18 but it also seems to be upstream LLVM. I thought the script is cloning some fork with a bunch of patches on it? I invoked it with ./scripts/configure_llvm.sh 17 /home/kherbst/local-chip/ dynamic on

@karolherbst
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ohh, and it's samples/cuda_samples/cuda-vectorAdd causing that error:

[Vector addition of 50000 elements]
Copy input data from the host memory to the CUDA device
CUDA kernel launch with 49 blocks of 1024 threads
CHIP error [TID 2508248] [1713525208.103528257] : Program LOG for device #0:Mesa Intel(R) UHD Graphics (CML GT2):
(file=input,line=0,column=0,index=6): 1st operand of Capability: operand FPFastMathModeINTEL(5837) requires one of these extensions: SPV_INTEL_fp_fast_math_mode 
  OpCapability FPFastMathModeINTEL



CHIP error [TID 2508248] [1713525208.103595858] : hipErrorNotInitialized (Compile step failed.) in /home/kherbst/git/chip-spv/src/backend/OpenCL/CHIPBackendOpenCL.cc:808:compileIL

CHIP error [TID 2508248] [1713525208.103661341] : Caught Error: hipErrorNotInitialized
Failed to launch vectorAdd kernel (error code hipErrorNotInitialized)!

@karolherbst
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fyi: I validate each incoming SPIR-V inside rusticl, so that's where that error is coming from.

@linehill
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mhh, seems to be on 6009708b4367171ccdbf4b5905cb6a803753fe18 but it also seems to be upstream LLVM.

To me it seems that the configure_llvm.sh does not do as advertised in the README.md and installs the upstream LLVM instead of chipStar's fork of it.

@karolherbst
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mhh, seems to be on 6009708b4367171ccdbf4b5905cb6a803753fe18 but it also seems to be upstream LLVM.

To me it seems that the configure_llvm.sh does not do as advertised in the README.md and installs the upstream LLVM instead of chipStar's fork of it.

yeah, seems you are right. Guess I'll need to hack around it locally for now, but don't know when I'll find time this week for another round of testing. Would be helpful if one could fix it in the meantime.

@pvelesko pvelesko added this to the Release 1.2 milestone May 29, 2024
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configure_llvm.sh does not do as advertised in the README.md and installs the upstream LLVM instead of chipStar's fork of it

this was resolved. Please re-open if the issue persists.

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