by Viktoria Biliouri
Creation of a 7-Segments Indication Driver for FPGA SPARTAN 3 console ,on ISE Design Suite (Verilog).
The following verilog files, compose the full process for the creation of a 7-segment indication driver. The FourDigitLEDdriver.v is the top module and the Testbench.v the tesbench file.
fourdigitleddriver.ucf is the constraints file.
fourdigitleddriver.bit is the bitfile that can be used for testing on Fpga Spartan 3 console.
The full process of the project is described analytically in Report.pdf