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feat: separate addition gate after final RAM gate (#4851)
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One of several small optimizations to be removed to achieve sorting.
This PR breaks what was once a single arithmetic gate defined in
`create_final_sorted_RAM_gate` into a "dummy" gate (one where the
selectors are all zero) and an arithmetic gate. The dummy gate is needed
to provide shifted wire values for the previous RAM gate. The arithmetic
gate, which is only needed for an unrelated consistency check, can then
be sorted to a new location without issue. This adds one gate per RAM
array used in a circuit.
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ledwards2225 authored Feb 29, 2024
1 parent 01dd0a9 commit f329db4
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Showing 2 changed files with 31 additions and 12 deletions.
Original file line number Diff line number Diff line change
Expand Up @@ -2133,11 +2133,38 @@ void UltraCircuitBuilder_<Arithmetization>::create_final_sorted_RAM_gate(RamReco
record.record_witness = this->add_variable(0);
record.gate_index = this->num_gates;

// TODO(https://github.com/AztecProtocol/barretenberg/issues/879): This method used to add a single arithmetic gate
// with two purposes: (1) to provide wire values to the previous RAM gate via shifts, and (2) to perform a
// consistency check on the value in wire 1. These two purposes have been split into a dummy gate and a simplified
// arithmetic gate, respectively. This allows both purposes to be served even after arithmetic gates are sorted out
// of sequence with the RAM gates.

// Create a final gate with all selectors zero; wire values are accessed by the previous RAM gate via shifted wires
blocks.main.populate_wires(
record.index_witness, record.timestamp_witness, record.value_witness, record.record_witness);
blocks.main.q_m().emplace_back(0);
blocks.main.q_1().emplace_back(0);
blocks.main.q_2().emplace_back(0);
blocks.main.q_3().emplace_back(0);
blocks.main.q_c().emplace_back(0);
blocks.main.q_arith().emplace_back(0);
blocks.main.q_4().emplace_back(0);
blocks.main.q_sort().emplace_back(0);
blocks.main.q_elliptic().emplace_back(0);
blocks.main.q_lookup_type().emplace_back(0);
blocks.main.q_aux().emplace_back(0);
if constexpr (HasAdditionalSelectors<Arithmetization>) {
blocks.main.pad_additional();
}
check_selector_length_consistency();
++this->num_gates;

// Create an add gate ensuring the final index is consistent with the size of the RAM array
create_big_add_gate({
record.index_witness,
record.timestamp_witness,
record.value_witness,
record.record_witness,
this->zero_idx,
this->zero_idx,
this->zero_idx,
1,
0,
0,
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Original file line number Diff line number Diff line change
Expand Up @@ -30,15 +30,7 @@ void ensure_non_zero(auto& polynomial)
*/
template <typename Flavor, typename Relation> void check_relation(auto circuit_size, auto& polynomials, auto params)
{
using AllValues = typename Flavor::AllValues;
for (size_t i = 0; i < circuit_size; i++) {

// Extract an array containing all the polynomial evaluations at a given row i
AllValues evaluations_at_index_i;
for (auto [eval, poly] : zip_view(evaluations_at_index_i.get_all(), polynomials.get_all())) {
eval = poly[i];
}

// Define the appropriate SumcheckArrayOfValuesOverSubrelations type for this relation and initialize to zero
using SumcheckArrayOfValuesOverSubrelations = typename Relation::SumcheckArrayOfValuesOverSubrelations;
SumcheckArrayOfValuesOverSubrelations result;
Expand All @@ -47,7 +39,7 @@ template <typename Flavor, typename Relation> void check_relation(auto circuit_s
}

// Evaluate each constraint in the relation and check that each is satisfied
Relation::accumulate(result, evaluations_at_index_i, params, 1);
Relation::accumulate(result, polynomials.get_row(i), params, 1);
for (auto& element : result) {
ASSERT_EQ(element, 0);
}
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